llext: xtensa: improvements for xtensa platform #1
Conversation
This file contains hidden or bidirectional Unicode text that may be interpreted or compiled differently than what appears below. To review, open the file in an editor that reveals hidden Unicode characters.
Learn more about bidirectional Unicode characters
andreagilardoni
force-pushed
the
llext-xtensa-improvements
branch
from
8e5963a to
3022f69
Compare
pillo79
reviewed
Nov 26, 2025
Owner
There was a problem hiding this comment.
General first review comments:
-
Zephyr needs to support bisecting so every commit needs to be self-supporting. Support for something must come before or together with the first users of something.
-
merge similar commits describing the overall goal: for example [llext: xtensa: harvard based architectures address check] and [llext: xtensa: fixing text section reuse check] must become one, also [arc: llext: custom settings for arc architecture] should be merged or before [llext: heap: section attribute customization].
-
we need to understand how to add the information in
arch/arc/include/llext_arch_custom.hfile in a way that is hierarchical. 🤔 ⚙️ 💭
Comment on lines
+17
to
+19
| #if CONFIG_HARVARD && CONFIG_ARC | ||
| #include <llext_arch_custom.h> | ||
| #endif |
Owner
There was a problem hiding this comment.
Not sure how to fix this, but we can't have this kind of per-arch or per-soc logic in llext.
pillo79
reviewed
Nov 26, 2025
Comment on lines
+33
to
+37
| #include <memory.h> | ||
|
|
||
| #define INSTR_FETCHABLE(base_addr, alloc) \ | ||
| (IN_RANGE((uintptr_t)(base_addr), SRAM1_IRAM_START, SRAM1_IRAM_START + SRAM1_SIZE) && \ | ||
| IN_RANGE((uintptr_t)(base_addr) + alloc, SRAM1_IRAM_START, SRAM1_IRAM_START + SRAM1_SIZE)) |
Owner
There was a problem hiding this comment.
This (and the above) need to be moved to the same place as the stuff in arc_custom - where ❓ .
Fix reference to kernel.h and add zephyr namespace where it was missing. Signed-off-by: Anas Nashif <anas.nashif@intel.com>
Many include paths missing the zephyr namespace. Signed-off-by: Anas Nashif <anas.nashif@intel.com>
Fix nsec set and get Signed-off-by: Qingsong Gou <gouqs@hotmail.com>
Similarly to what was present on L0, GPIO port indexes are not continuous in EXTI configuration register and a dedicated treatment is required. Deal with it case by case. Signed-off-by: Erwan Gouriou <erwan.gouriou@st.com>
Multiple submitted requests are getting merged to single cancelled net_buf on endpoint dequeue. While MSC class was correctly decrementing the usage counters, it was not freeing SCSI buffer pointed to by frags. Signed-off-by: Tomasz Moń <tomasz.mon@nordicsemi.no>
Removing references to infineon,cat1-spi-pdl from the device tree files. Updates the driver bindings and driver file to look at the infineon,cat1-spi binding and uses a Kconfig option to select Legacy HAL implementation instead. See zephyrproject-rtos#98035 for context. Signed-off-by: John Batch <john.batch@infineon.com>
Removing references to infineon,cat1-spi-pdl. Differentiation between PDL and HAL drivers have been changed to use Kconfig options. Signed-off-by: John Batch <john.batch@infineon.com>
Add support for heltec_wireless_tracker Signed-off-by: Ilan Costa <ilan.costa@gmail.com>
When low-power mode timer is enabled, a counter alarm is set on the idle timer before entering low-power mode. The counter API requires a non-NULL callback function for the alarm. This commit adds a stub callback function to satisfy the API requirement. Signed-off-by: Zhaoxiang Jin <Zhaoxiang.Jin_1@nxp.com>
This commit adds a prompt to the Kconfig file to make CORTEX_M_SYSTICK_RESET_BY_LPM option more visible to users configuring the driver. Signed-off-by: Zhaoxiang Jin <Zhaoxiang.Jin_1@nxp.com>
Move the existing "--no-load" argument from the OpenOCD and Intel Cyclone V runners into an argument in the runners base class such that it can be used by all runners. Also update the existing runners to work with the common option instead of their own. Signed-off-by: Mathieu Choplain <mathieu.choplain-ext@st.com>
Add support for the --load/--no-load argument from the base runner class. Signed-off-by: Mathieu Choplain <mathieu.choplain-ext@st.com>
Allow flash devices to be accessed using the NVMEM API. Note that it simply uses the read/write API functions. Erasing should be handled by the application. Signed-off-by: Pieter De Gendt <pieter.degendt@basalte.be>
Add an overlay/config to test the NVMEM subsystem with a flash driver. Signed-off-by: Pieter De Gendt <pieter.degendt@basalte.be>
Add an entry with Kconfig options for NVMEM on flash devices. Signed-off-by: Pieter De Gendt <pieter.degendt@basalte.be>
ATT is invoking user callbacks in its net_buf destroy function. It is
common practice that these callbacks can block on bt_hci_cmd_alloc().
This is a deadlock when the net_buf_unref() happens inside the HCI
driver, invoked from tx_processor.
Blocking callbacks like this appear in our own samples. See further down
about how this problem was detected.
tx_processor not protect against blocking callbacks so it is de-facto
forbidden. The Host should not equip net_bufs with dangerous destroy
callbacks.
This commit makes ATT defer its net_buf destruction and user callback
invocation to the system workqueue, so that net_buf_unref is safe to
call from non-blocking threads. In the case of the deadlock, the
net_buf_unref() was below the tx_processor in the call stack, which (at
the time of this commit) is on the system work queue, so defering it to
the system work queue is preserving the existing behavior.
Future improvement may be to allow the user to provide their own
workqueue for ATT callbacks.
This deadlock was detected because the following test was failing while
moving tx_processor to the bt_taskq:
tests/bsim/bluetooth/ll/throughput/tests_scripts/gatt_write.sh
The above test has an ATT callback `write_cmd_cb` invokes
`bt_conn_le_param_update` can block waiting for `tx_processor`.
The reason it was not failing while tx_processor was on the system work
queue is that the GATT API has a special non-blocking behavior when
called from the system work queue.
Signed-off-by: Aleksander Wasaznik <aleksander.wasaznik@nordicsemi.no>
Reduce BT_MAX_CONN from 62 to 61 to make it build on integration platform qemu_cortex_m3/ti_lm3s6965 when we add bt_taskq in subsequent commit. The number 62 seems arbitrary here, so reducing it by one should not have any practical impact. Signed-off-by: Aleksander Wasaznik <aleksander.wasaznik@nordicsemi.no>
When thread that TX processor is used to send commands and data to Controller is also used for sync commands sending and command buffer allocation, a deadlock happens. This thread is used to avoid such deadlocks by moving TX processor to its own dedicated thread exclusively used by tx processor only. Co-authored-by: Pavel Vasilyev <pavel.vasilyev@nordicsemi.no> Signed-off-by: Pavel Vasilyev <pavel.vasilyev@nordicsemi.no> Signed-off-by: Aleksander Wasaznik <aleksander.wasaznik@nordicsemi.no>
The workaround in bt_cmd_send_sync should no longer by needed when tx_processor is not on the system work queue. Signed-off-by: Aleksander Wasaznik <aleksander.wasaznik@nordicsemi.no>
Add spi controller bingdings Signed-off-by: Qingsong Gou <gouqs@hotmail.com>
Add spi for sf32lb platform Signed-off-by: Qingsong Gou <gouqs@hotmail.com>
Add spi driver for sifli sf32lb platform Signed-off-by: Qingsong Gou <gouqs@hotmail.com>
Enable spi1 on sf32lb52_devkit_lcd board Signed-off-by: Qingsong Gou <gouqs@hotmail.com>
Add board sf32lb52_devkit_lcd support Signed-off-by: Qingsong Gou <gouqs@hotmail.com>
Replace use of `select` with `depends on` in the LL_SW_SPLIT Kconfig options. Signed-off-by: Vinayak Kariappa Chettimada <vich@nordicsemi.no>
andreagilardoni
force-pushed
the
llext-xtensa-improvements
branch
from
3022f69 to
2e19a35
Compare
Updates hal version to have spi defines fixes. Signed-off-by: Camille BAUD <mail@massdriver.space>
Removed unnecessary power management state lock calls since the DMA is on a power domain that already handles state locking. It will now managed directly pm_device which will active power_domain and then block pm_state. Signed-off-by: Martin Hoff <martin.hoff@silabs.com>
This patch fix a reg write that needs to be done before calling the callback. Since the user can start a new dma transfer in the callback, it can miss the interrupt from the new transfer if the new transfer is done before the interrupt bit is cleared. Signed-off-by: Martin Hoff <martin.hoff@silabs.com>
Removed conditional checks for device runtime put in DMA RX and TX callbacks, ensuring that device runtime is always released asynchronously. Signed-off-by: Martin Hoff <martin.hoff@silabs.com>
andreagilardoni
force-pushed
the
llext-xtensa-improvements
branch
from
2e19a35 to
d04c782
Compare
Harvard architecture refers to a CPU architecture with separate storage and signal pathways for instructions and data. This is in contrast with the more common von Neumann architecture, where program instructions and data share the same address maps. This is already used in the ARC architecture, so this patch adds a common HARVARD config option in arch/Kconfig, and makes ARC's existing HARVARD config option user-selectable. Signed-off-by: Luca Burelli <l.burelli@arduino.cc>
This change marks the Xtensa architecture as having separate code and data paths. This is necessary for proper handling of llext buffers. Signed-off-by: Luca Burelli <l.burelli@arduino.cc>
A valid elf file may contain a relocation section with no relocation to perform, skipping its relocation Signed-off-by: Andrea Gilardoni <a.gilardoni@arduino.cc>
This change aligns xtensa llext link procedure to follow the other architecures linkage flow in favor of code reuse Signed-off-by: Andrea Gilardoni <a.gilardoni@arduino.cc>
This options allows to select the relocation method to perform on xtensa platform. If disable this allows to use the common flow used by other platforms Signed-off-by: Andrea Gilardoni <a.gilardoni@arduino.cc>
llext_loaded_sect_ptr result is not being usend anywhere Signed-off-by: Andrea Gilardoni <a.gilardoni@arduino.cc>
memory.h file in esp32s3 soc definition is missing SRAM1_SIZE Signed-off-by: Andrea Gilardoni <a.gilardoni@arduino.cc>
This commit adds the missing definition of INSTR_FETCHABLE macro that is required for Harvard architectures in order to properly check that the address of an instruction is being accessed on the proper instruction bus Signed-off-by: Andrea Gilardoni <a.gilardoni@arduino.cc>
This commit adds arch_d2i_address and arch_i2d_address which can be used in an harvard based architecture to convert an address from being accessed through the data bus to the instruction bus and vicevers Signed-off-by: Andrea Gilardoni <a.gilardoni@arduino.cc>
The extracted section name is only used when CONFIG_LLEXT_XTENSA_PLT=y or debug logging is enabled Signed-off-by: Andrea Gilardoni <a.gilardoni@arduino.cc>
Adding a file that contains ARC specific customization for llext, i.e. data and instruction heap section attributes definition Signed-off-by: Andrea Gilardoni <a.gilardoni@arduino.cc>
This commit add the possibility of using externally defined section attributes for instr and data heaps for Harvard based architectures Signed-off-by: Andrea Gilardoni <a.gilardoni@arduino.cc>
using arch_d2i_address function for llext to check init function addresess correctly in the ibus space Signed-off-by: Andrea Gilardoni <a.gilardoni@arduino.cc>
converting text section addess to instruction space in order to check correclty for reuse for xtensa architecture Signed-off-by: Andrea Gilardoni <a.gilardoni@arduino.cc>
andreagilardoni
force-pushed
the
llext-xtensa-improvements
branch
from
d04c782 to
85b44f0
Compare
Sign up for free
to join this conversation on GitHub.
Already have an account?
Sign in to comment
20 participants
Add this suggestion to a batch that can be applied as a single commit.
This suggestion is invalid because no changes were made to the code.
Suggestions cannot be applied while the pull request is closed.
Suggestions cannot be applied while viewing a subset of changes.
Only one suggestion per line can be applied in a batch.
Add this suggestion to a batch that can be applied as a single commit.
Applying suggestions on deleted lines is not supported.
You must change the existing code in this line in order to create a valid suggestion.
Outdated suggestions cannot be applied.
This suggestion has been applied or marked resolved.
Suggestions cannot be applied from pending reviews.
Suggestions cannot be applied on multi-line comments.
Suggestions cannot be applied while the pull request is queued to merge.
Suggestion cannot be applied right now. Please check back later.
This PR aims to improve the integration with the xtensa platform, in particular for espressif based boards, like esp32s3 soc.
Main changes:
arch_elf_relocatewith zephyr llext standard flow, optionally available