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Merged
andoma merged 2 commits into from
Feb 5, 2026
Merged

Pek/spi6 tim12 #41

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3979055
stm32h7 - Add CLK_TIM12 and set FDCAN_XIDFC
Jan 20, 2026
9b0c4eb
stm32h7 : Add SPI6
Feb 5, 2026
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4 changes: 4 additions & 0 deletions src/platform/stm32h7/stm32h7_can.c
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Original file line number Diff line number Diff line change
Expand Up @@ -20,6 +20,7 @@
#define FDCAN_ILE 0x05c

#define FDCAN_SIDFC 0x084
#define FDCAN_XIDFC 0x088

#define FDCAN_RXF0C 0x0a0
#define FDCAN_RXF0S 0x0a4
Expand Down Expand Up @@ -90,6 +91,9 @@ stm32h7_can_init(int instance, gpio_t can_tx, gpio_t can_rx,
(ram_offset + FDCAN_FLSSA(0)) |
(fc->num_std_filters << 16));

reg_wr(fc->reg_base + FDCAN_XIDFC,
(ram_offset + FDCAN_FLESA));

reg_wr(fc->reg_base + FDCAN_TXBC,
(ram_offset + FDCAN_TXBUF(0, 0)) |
(0 << 16) |
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3 changes: 3 additions & 0 deletions src/platform/stm32h7/stm32h7_clk.h
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Original file line number Diff line number Diff line change
Expand Up @@ -76,6 +76,8 @@
#define CLK_TIM1 CLK_ID(RCC_APB2ENR, 0)
#define CLK_TIM8 CLK_ID(RCC_APB2ENR, 1)

#define CLK_TIM12 CLK_ID(RCC_APB1LENR, 6)

#define CLK_TIM15 CLK_ID(RCC_APB2ENR, 16)
#define CLK_TIM16 CLK_ID(RCC_APB2ENR, 17)
#define CLK_TIM17 CLK_ID(RCC_APB2ENR, 18)
Expand All @@ -100,6 +102,7 @@
#define CLK_I2C3 CLK_ID(RCC_APB1LENR, 23)

#define CLK_SYSCFG CLK_ID(RCC_APB4ENR, 1)
#define CLK_SPI6 CLK_ID(RCC_APB4ENR, 5)
#define CLK_I2C4 CLK_ID(RCC_APB4ENR, 7)
#define CLK_VREFEN CLK_ID(RCC_APB4ENR, 15)

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1 change: 1 addition & 0 deletions src/platform/stm32h7/stm32h7_spi.c
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Expand Up @@ -48,6 +48,7 @@ static const struct {
{ SPI3_BASE, 62, 61, CLK_SPI3, 6, 51, 16 },
{ SPI4_BASE, 84, 83, CLK_SPI4, 5, 84, 8 },
{ SPI5_BASE, 86, 85, CLK_SPI5, 5, 85, 8 },
{ SPI6_BASE, 12, 11, CLK_SPI6, 8, 86, 8 },
};


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1 change: 1 addition & 0 deletions src/platform/stm32h7/stm32h7_spi.h
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Original file line number Diff line number Diff line change
Expand Up @@ -18,6 +18,7 @@
#define SPI3_BASE 0x40003c00
#define SPI4_BASE 0x40013400
#define SPI5_BASE 0x40015000
#define SPI6_BASE 0x58001400

spi_t *stm32h7_spi_create(unsigned int instance, gpio_t clk, gpio_t miso,
gpio_t mosi, gpio_output_speed_t speed);
1 change: 1 addition & 0 deletions src/platform/stm32h7/stm32h7_tim.h
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Original file line number Diff line number Diff line change
Expand Up @@ -8,6 +8,7 @@
#define TIM7_BASE 0x40001400
#define TIM8_BASE 0x40010400

#define TIM12_BASE 0x40001800
#define TIM15_BASE 0x40014000
#define TIM16_BASE 0x40014400
#define TIM17_BASE 0x40014800
Expand Down