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python-release.yml
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Allow passing custom module_name to output_to_verilog and `output… Build and publish release #84: Commit 2a1aa8a pushed by fdxmw
16s development
development
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Run all tests with Python 3.14 by default. Remove Python 3.9 support … Build and publish release #83: Commit c9a7b10 pushed by fdxmw
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Migrate PyRTL to uv (#476) Build and publish release #82: Commit 1c06c9e pushed by fdxmw
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Use op_param's readability aliases in Gate.__str__. Build and publish release #81: Commit 001fba1 pushed by fdxmw
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Fix code style issues identified by newer versions of ruff. Also: Build and publish release #80: Commit 8c706f6 pushed by fdxmw
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Add readability aliases for Gate.op_param. These aliases assign nam… Build and publish release #79: Commit 137ff35 pushed by fdxmw
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Add documentation and examples for Const.val, `Register.reset_value… Build and publish release #78: Commit 0a57cd4 pushed by fdxmw
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Fix a typo in CHANGELOG.md's release notes for 0.12. Build and publish release #77: Commit ef456b6 pushed by fdxmw
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Build and publish release Build and publish release #76: by fdxmw
4m 16s 0.12
0.12
4m 16s
Update CHANGELOG.md for 0.12 release Build and publish release #75: Commit 5ad9ed6 pushed by fdxmw
20s development
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Update output_to_verilog to inline temporary wires, using `GateGrap… Build and publish release #74: Commit 98d2b5c pushed by fdxmw
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Initial implementation of GateGraph, an alternative PyRTL logic rep… Build and publish release #73: Commit 3deeedd pushed by fdxmw
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Simplify Verilog export string formatting code. No functionality chan… Build and publish release #72: Commit 370aa4b pushed by fdxmw
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Add a to_ipynb.py script that converts a PyRTL example script to a … Build and publish release #71: Commit 18e0639 pushed by fdxmw
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Add a doctest example for rtllib/barrel.py Build and publish release #70: Commit 6636fa8 pushed by fdxmw
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Restore documentation for enum_mux and add a doctest example. Build and publish release #69: Commit e348b82 pushed by fdxmw
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Replace pylint and pycodestyle with ruff. ruff is much faster… Build and publish release #68: Commit 5b93a9e pushed by fdxmw
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Major rework of rtllib's documentation, lots of changes: Build and publish release #67: Commit bde52d6 pushed by fdxmw
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Remove references to the analysis and conditional submodules. Build and publish release #66: Commit e295dd0 pushed by fdxmw
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Make all top-level pyrtl names canonical, and stop using submodule … Build and publish release #65: Commit b8dafaa pushed by fdxmw
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Add doctest examples to helperfuncs.py. Also: Build and publish release #64: Commit 685eaa4 pushed by fdxmw
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Update Memory and Simulation documentation. Lots of improvements: Build and publish release #63: Commit e7e007a pushed by fdxmw
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Enable doctest, improve type annotations and documentation in `help… Build and publish release #62: Commit 5b42f02 pushed by fdxmw
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Improve type annotations and documentation in corecircuits.py. Also: Build and publish release #61: Commit 9e42313 pushed by fdxmw
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Clean up match_bitpattern by simplifying some logic, renaming some … Build and publish release #60: Commit 504aa89 pushed by fdxmw
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