Add microarchitecture detection for RISC-V clusters at HCA

.github/workflows/tests_archdetect.yml

@@ -25,6 +25,9 @@ jobs:
           - aarch64/neoverse_v1/AWS-awslinux-graviton3
           - aarch64/nvidia/grace/Jureca-Rocky95
           - aarch64/google/axion/GCP-axion
+          - riscv64/sifive/premier-Ubuntu24
+          - riscv64/spacemit/bananaf3-Armbian
+          - riscv64/spacemit/bananaf3-k6.6
           # commented out since these targets are currently not supported in software.eessi.io repo
           # (and some tests assume that the corresponding subdirectory in software layer is there)
           # - ppc64le/power9le/unknown-power9le

init/arch_specs/eessi_arch_riscv.spec

@@ -1 +1,7 @@
+# RISC-V CPU architecture specifications (see https://github.com/riscv/learn?tab=readme-ov-file#open-risc-v-implementations)
+# CPU vendors: SiFive (0x489), Spacemit (0x710)
+
 # Software path in EESSI 	| Vendor ID 	| List of defining CPU features
+"riscv64/sifive/p550"		"0x489"		"rv64imafdch_zicsr_zifencei_zba_zbb_sscofpmf"	# HiFive Premier P550
+"riscv64/spacemit/x60"		"0x710"		"rv64imafdcv_sscofpmf_sstc_svpbmt_zicbom_zicboz_zicbop_zihintpause"	# Banana Pi F3
+"riscv64/spacemit/x60-k6.6"	"0x710"		"rv64imafdcv_zicbom_zicboz_zicntr_zicond_zicsr_zifencei_zihintpause_zihpm_zfh_zfhmin_zca_zcd_zba_zbb_zbc_zbs_zkt_zve32f_zve32x_zve64d_zve64f_zve64x_zvfh_zvfhmin_zvkt_sscofpmf_sstc_svinval_svnapot_svpbmt"	# Banana Pi F3 k6.6

init/eessi_archdetect.sh

@@ -114,6 +114,9 @@ cpupath(){
     local cpu_vendor=$(get_cpuinfo "vendor[ _]id")
     if [ "${cpu_vendor}" == "" ]; then
         cpu_vendor=$(get_cpuinfo "cpu[ _]implementer")
+        if [ "${cpu_vendor}" == "" ]; then
+            cpu_vendor=$(get_cpuinfo "mvendorid")
+        fi
     fi
     log "DEBUG" "cpupath: CPU vendor of host system: '$cpu_vendor'"
 
@@ -129,6 +132,9 @@ cpupath(){
     # on 64-bit POWER, we need to look at 'cpu' field
     elif [ "${machine_type}" == "ppc64le" ]; then
         cpu_flag_tag='cpu'
+    # on 64-bit RISC-V, we need to look at 'isa' field
+    elif [ "${machine_type}" == "riscv64" ]; then
+        cpu_flag_tag='isa'
     else
         cpu_flag_tag='flags'
     fi

tests/archdetect/riscv64/sifive/premier-Ubuntu24.all.output

@@ -0,0 +1 @@
+riscv64/sifive/p550:riscv64/generic

tests/archdetect/riscv64/sifive/premier-Ubuntu24.cpuinfo

@@ -0,0 +1,8 @@
+processor       : 0
+hart            : 3
+isa             : rv64imafdch_zicsr_zifencei_zba_zbb_sscofpmf
+mmu             : sv48
+mvendorid       : 0x489
+marchid         : 0x8000000000000008
+mimpid          : 0x6220425
+

tests/archdetect/riscv64/sifive/premier-Ubuntu24.output

@@ -0,0 +1 @@
+riscv64/sifive/p550

tests/archdetect/riscv64/spacemit/bananaf3-Armbian.all.output

@@ -0,0 +1 @@
+riscv64/spacemit/x60:riscv64/generic

tests/archdetect/riscv64/spacemit/bananaf3-Armbian.cpuinfo

@@ -0,0 +1,9 @@
+processor       : 0
+hart            : 0
+model name      : Spacemit(R) X60
+isa             : rv64imafdcv_sscofpmf_sstc_svpbmt_zicbom_zicboz_zicbop_zihintpause
+mmu             : sv39
+mvendorid       : 0x710
+marchid         : 0x8000000058000001
+mimpid          : 0x1000000049772200
+

tests/archdetect/riscv64/spacemit/bananaf3-Armbian.output

@@ -0,0 +1 @@
+riscv64/spacemit/x60

tests/archdetect/riscv64/spacemit/bananaf3-k6.6.all.output

@@ -0,0 +1 @@
+riscv64/spacemit/x60-k6.6:riscv64/generic

tests/archdetect/riscv64/spacemit/bananaf3-k6.6.cpuinfo

@@ -0,0 +1,9 @@
+processor       : 0
+hart            : 0
+model name      : Spacemit(R) X60
+isa             : rv64imafdcv_zicbom_zicboz_zicntr_zicond_zicsr_zifencei_zihintpause_zihpm_zfh_zfhmin_zca_zcd_zba_zbb_zbc_zbs_zkt_zve32f_zve32x_zve64d_zve64f_zve64x_zvfh_zvfhmin_zvkt_sscofpmf_sstc_svinval_svnapot_svpbmt
+mmu             : sv39
+uarch           : spacemit,x60
+mvendorid       : 0x710
+marchid         : 0x8000000058000001
+mimpid          : 0x1000000049772200

tests/archdetect/riscv64/spacemit/bananaf3-k6.6.output

@@ -0,0 +1 @@
+riscv64/spacemit/x60-k6.6