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Doubleimpala/README.md

Hi 👋, I'm Tanmay

A Computer Engineering Student at University of Illinois Urbana-Champaign

  • 🔧 I’m currently working on building my own RISC V CPU, and a tiny GPU for 3d polygonal rendering (with textures!).
  • 🔍 Conducting research with tensor accelerators.
  • 🔭 Always looking for more opportunity to explore hardware design.

Connect with me:

tanmay garudadri

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  1. 3d-Polygonal-Graphics-Processor 3d-Polygonal-Graphics-Processor Public

    A tiny GPU that renders 3d polygons. Implemented in C and System Verilog on a Spartan 7 FPGA.

    C 1

  2. RISC-VI RISC-VI Public

    I am currently making a CPU from scratch using System Verilog. Planned specifications: - 5-stage pipeline - Superscalar - Out-of-Order processing. I plan to complete the synthesizing, then code an …

    SystemVerilog 1