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luojia65luojia65
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Merge pull request #6 from woshiluo/node
feat: add `Node` type for FDT node with dynamic types.
2 parents 1c65f31 + 93d6b9a commit 730c317

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15 files changed

+472
-198
lines changed

15 files changed

+472
-198
lines changed

‎examples/hifive-unmatched-a00.rs‎

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -46,7 +46,7 @@ struct Cpu<'a> {
4646
compatible: Compatible<'a>,
4747
}
4848

49-
const RAW_DEVICE_TREE: &'static [u8] = include_bytes!("hifive-unmatched-a00.dtb");
49+
const RAW_DEVICE_TREE: &[u8] = include_bytes!("hifive-unmatched-a00.dtb");
5050
const BUFFER_SIZE: usize = RAW_DEVICE_TREE.len();
5151

5252
#[repr(align(4))]
@@ -58,7 +58,7 @@ fn main() {
5858
let mut aligned_data: Box<AlignedBuffer> = Box::new(AlignedBuffer {
5959
data: [0; BUFFER_SIZE],
6060
});
61-
aligned_data.data[..BUFFER_SIZE].clone_from_slice(&RAW_DEVICE_TREE);
61+
aligned_data.data[..BUFFER_SIZE].clone_from_slice(RAW_DEVICE_TREE);
6262
let ptr = aligned_data.data.as_ptr();
6363
let t: Tree = unsafe { serde_device_tree::from_raw(ptr) }.unwrap();
6464
println!("#address_cells = {}", t.num_address_cells);

‎examples/qemu-virt.dtb‎

-1020 KB
Binary file not shown.

‎examples/qemu-virt.dts‎

Lines changed: 84 additions & 131 deletions
Original file line numberDiff line numberDiff line change
@@ -6,28 +6,31 @@
66
compatible = "riscv-virtio";
77
model = "riscv-virtio,qemu";
88

9-
fw-cfg@10100000 {
10-
dma-coherent;
11-
reg = <0x00 0x10100000 0x00 0x18>;
12-
compatible = "qemu,fw-cfg-mmio";
9+
poweroff {
10+
value = <0x5555>;
11+
offset = <0x00>;
12+
regmap = <0x04>;
13+
compatible = "syscon-poweroff";
1314
};
1415

15-
flash@20000000 {
16-
bank-width = <0x04>;
17-
reg = <0x00 0x20000000 0x00 0x2000000 0x00 0x22000000 0x00 0x2000000>;
18-
compatible = "cfi-flash";
16+
reboot {
17+
value = <0x7777>;
18+
offset = <0x00>;
19+
regmap = <0x04>;
20+
compatible = "syscon-reboot";
1921
};
2022

21-
chosen {
22-
linux,initrd-end = <0x90011200>;
23-
linux,initrd-start = <0x88200000>;
24-
bootargs = "LOG=warn";
25-
stdout-path = "/soc/uart@10000000";
23+
platform-bus@4000000 {
24+
interrupt-parent = <0x03>;
25+
ranges = <0x00 0x00 0x4000000 0x2000000>;
26+
#address-cells = <0x01>;
27+
#size-cells = <0x01>;
28+
compatible = "qemu,platform", "simple-bus";
2629
};
2730

2831
memory@80000000 {
2932
device_type = "memory";
30-
reg = <0x00 0x80000000 0x00 0x20000000>;
33+
reg = <0x00 0x80000000 0x01 0x00>;
3134
};
3235

3336
cpus {
@@ -36,64 +39,18 @@
3639
timebase-frequency = <0x989680>;
3740

3841
cpu@0 {
39-
phandle = <0x07>;
40-
device_type = "cpu";
41-
reg = <0x00>;
42-
status = "okay";
43-
compatible = "riscv";
44-
riscv,isa = "rv64imafdcsu";
45-
mmu-type = "riscv,sv48";
46-
47-
interrupt-controller {
48-
#interrupt-cells = <0x01>;
49-
interrupt-controller;
50-
compatible = "riscv,cpu-intc";
51-
phandle = <0x08>;
52-
};
53-
};
54-
55-
cpu@1 {
56-
phandle = <0x05>;
57-
device_type = "cpu";
58-
reg = <0x01>;
59-
status = "okay";
60-
compatible = "riscv";
61-
riscv,isa = "rv64imafdcsu";
62-
mmu-type = "riscv,sv48";
63-
64-
interrupt-controller {
65-
#interrupt-cells = <0x01>;
66-
interrupt-controller;
67-
compatible = "riscv,cpu-intc";
68-
phandle = <0x06>;
69-
};
70-
};
71-
72-
cpu@2 {
73-
phandle = <0x03>;
74-
device_type = "cpu";
75-
reg = <0x02>;
76-
status = "okay";
77-
compatible = "riscv";
78-
riscv,isa = "rv64imafdcsu";
79-
mmu-type = "riscv,sv48";
80-
81-
interrupt-controller {
82-
#interrupt-cells = <0x01>;
83-
interrupt-controller;
84-
compatible = "riscv,cpu-intc";
85-
phandle = <0x04>;
86-
};
87-
};
88-
89-
cpu@3 {
9042
phandle = <0x01>;
9143
device_type = "cpu";
92-
reg = <0x03>;
44+
reg = <0x00>;
9345
status = "okay";
9446
compatible = "riscv";
95-
riscv,isa = "rv64imafdcsu";
96-
mmu-type = "riscv,sv48";
47+
riscv,cbop-block-size = <0x40>;
48+
riscv,cboz-block-size = <0x40>;
49+
riscv,cbom-block-size = <0x40>;
50+
riscv,isa-extensions = "i", "m", "a", "f", "d", "c", "h", "zic64b", "zicbom", "zicbop", "zicboz", "ziccamoa", "ziccif", "zicclsm", "ziccrse", "zicntr", "zicsr", "zifencei", "zihintntl", "zihintpause", "zihpm", "zmmul", "za64rs", "zaamo", "zalrsc", "zawrs", "zfa", "zca", "zcd", "zba", "zbb", "zbc", "zbs", "ssccptr", "sscounterenw", "sstc", "sstvala", "sstvecd", "svadu";
51+
riscv,isa-base = "rv64i";
52+
riscv,isa = "rv64imafdch_zic64b_zicbom_zicbop_zicboz_ziccamoa_ziccif_zicclsm_ziccrse_zicntr_zicsr_zifencei_zihintntl_zihintpause_zihpm_zmmul_za64rs_zaamo_zalrsc_zawrs_zfa_zca_zcd_zba_zbb_zbc_zbs_ssccptr_sscounterenw_sstc_sstvala_sstvecd_svadu";
53+
mmu-type = "riscv,sv57";
9754

9855
interrupt-controller {
9956
#interrupt-cells = <0x01>;
@@ -108,24 +65,34 @@
10865
cluster0 {
10966

11067
core0 {
111-
cpu = <0x07>;
112-
};
113-
114-
core1 {
115-
cpu = <0x05>;
116-
};
117-
118-
core2 {
119-
cpu = <0x03>;
120-
};
121-
122-
core3 {
12368
cpu = <0x01>;
12469
};
12570
};
12671
};
12772
};
12873

74+
pmu {
75+
riscv,event-to-mhpmcounters = <0x01 0x01 0x7fff9 0x02 0x02 0x7fffc 0x10019 0x10019 0x7fff8 0x1001b 0x1001b 0x7fff8 0x10021 0x10021 0x7fff8>;
76+
compatible = "riscv,pmu";
77+
};
78+
79+
fw-cfg@10100000 {
80+
dma-coherent;
81+
reg = <0x00 0x10100000 0x00 0x18>;
82+
compatible = "qemu,fw-cfg-mmio";
83+
};
84+
85+
flash@20000000 {
86+
bank-width = <0x04>;
87+
reg = <0x00 0x20000000 0x00 0x2000000 0x00 0x22000000 0x00 0x2000000>;
88+
compatible = "cfi-flash";
89+
};
90+
91+
chosen {
92+
stdout-path = "/soc/serial@10000000";
93+
rng-seed = <0x7130a20f 0xd6aca8af 0xd15a1b49 0xbb97543b 0x9abd381 0x46f0a1aa 0x433e8701 0x50dfaac2>;
94+
};
95+
12996
soc {
13097
#address-cells = <0x02>;
13198
#size-cells = <0x02>;
@@ -134,125 +101,111 @@
134101

135102
rtc@101000 {
136103
interrupts = <0x0b>;
137-
interrupt-parent = <0x09>;
104+
interrupt-parent = <0x03>;
138105
reg = <0x00 0x101000 0x00 0x1000>;
139106
compatible = "google,goldfish-rtc";
140107
};
141108

142-
uart@10000000 {
109+
serial@10000000 {
143110
interrupts = <0x0a>;
144-
interrupt-parent = <0x09>;
145-
clock-frequency = <0x384000>;
111+
interrupt-parent = <0x03>;
112+
clock-frequency = "", "8@";
146113
reg = <0x00 0x10000000 0x00 0x100>;
147114
compatible = "ns16550a";
148115
};
149116

150-
poweroff {
151-
value = <0x5555>;
152-
offset = <0x00>;
153-
regmap = <0x0a>;
154-
compatible = "syscon-poweroff";
155-
};
156-
157-
reboot {
158-
value = <0x7777>;
159-
offset = <0x00>;
160-
regmap = <0x0a>;
161-
compatible = "syscon-reboot";
162-
};
163-
164117
test@100000 {
165-
phandle = <0x0a>;
118+
phandle = <0x04>;
166119
reg = <0x00 0x100000 0x00 0x1000>;
167-
compatible = "sifive,test1\0sifive,test0\0syscon";
168-
};
169-
170-
pci@30000000 {
171-
interrupt-map-mask = <0x1800 0x00 0x00 0x07>;
172-
interrupt-map = <0x00 0x00 0x00 0x01 0x09 0x20 0x00 0x00 0x00 0x02 0x09 0x21 0x00 0x00 0x00 0x03 0x09 0x22 0x00 0x00 0x00 0x04 0x09 0x23 0x800 0x00 0x00 0x01 0x09 0x21 0x800 0x00 0x00 0x02 0x09 0x22 0x800 0x00 0x00 0x03 0x09 0x23 0x800 0x00 0x00 0x04 0x09 0x20 0x1000 0x00 0x00 0x01 0x09 0x22 0x1000 0x00 0x00 0x02 0x09 0x23 0x1000 0x00 0x00 0x03 0x09 0x20 0x1000 0x00 0x00 0x04 0x09 0x21 0x1800 0x00 0x00 0x01 0x09 0x23 0x1800 0x00 0x00 0x02 0x09 0x20 0x1800 0x00 0x00 0x03 0x09 0x21 0x1800 0x00 0x00 0x04 0x09 0x22>;
173-
ranges = <0x1000000 0x00 0x00 0x00 0x3000000 0x00 0x10000 0x2000000 0x00 0x40000000 0x00 0x40000000 0x00 0x40000000 0x3000000 0x04 0x00 0x04 0x00 0x04 0x00>;
174-
reg = <0x00 0x30000000 0x00 0x10000000>;
175-
dma-coherent;
176-
bus-range = <0x00 0xff>;
177-
linux,pci-domain = <0x00>;
178-
device_type = "pci";
179-
compatible = "pci-host-ecam-generic";
180-
#size-cells = <0x02>;
181-
#interrupt-cells = <0x01>;
182-
#address-cells = <0x03>;
120+
compatible = "sifive,test1", "sifive,test0", "syscon";
183121
};
184122

185123
virtio_mmio@10008000 {
186124
interrupts = <0x08>;
187-
interrupt-parent = <0x09>;
125+
interrupt-parent = <0x03>;
188126
reg = <0x00 0x10008000 0x00 0x1000>;
189127
compatible = "virtio,mmio";
190128
};
191129

192130
virtio_mmio@10007000 {
193131
interrupts = <0x07>;
194-
interrupt-parent = <0x09>;
132+
interrupt-parent = <0x03>;
195133
reg = <0x00 0x10007000 0x00 0x1000>;
196134
compatible = "virtio,mmio";
197135
};
198136

199137
virtio_mmio@10006000 {
200138
interrupts = <0x06>;
201-
interrupt-parent = <0x09>;
139+
interrupt-parent = <0x03>;
202140
reg = <0x00 0x10006000 0x00 0x1000>;
203141
compatible = "virtio,mmio";
204142
};
205143

206144
virtio_mmio@10005000 {
207145
interrupts = <0x05>;
208-
interrupt-parent = <0x09>;
146+
interrupt-parent = <0x03>;
209147
reg = <0x00 0x10005000 0x00 0x1000>;
210148
compatible = "virtio,mmio";
211149
};
212150

213151
virtio_mmio@10004000 {
214152
interrupts = <0x04>;
215-
interrupt-parent = <0x09>;
153+
interrupt-parent = <0x03>;
216154
reg = <0x00 0x10004000 0x00 0x1000>;
217155
compatible = "virtio,mmio";
218156
};
219157

220158
virtio_mmio@10003000 {
221159
interrupts = <0x03>;
222-
interrupt-parent = <0x09>;
160+
interrupt-parent = <0x03>;
223161
reg = <0x00 0x10003000 0x00 0x1000>;
224162
compatible = "virtio,mmio";
225163
};
226164

227165
virtio_mmio@10002000 {
228166
interrupts = <0x02>;
229-
interrupt-parent = <0x09>;
167+
interrupt-parent = <0x03>;
230168
reg = <0x00 0x10002000 0x00 0x1000>;
231169
compatible = "virtio,mmio";
232170
};
233171

234172
virtio_mmio@10001000 {
235173
interrupts = <0x01>;
236-
interrupt-parent = <0x09>;
174+
interrupt-parent = <0x03>;
237175
reg = <0x00 0x10001000 0x00 0x1000>;
238176
compatible = "virtio,mmio";
239177
};
240178

241179
plic@c000000 {
242-
phandle = <0x09>;
243-
riscv,ndev = <0x35>;
244-
reg = <0x00 0xc000000 0x00 0x210000>;
245-
interrupts-extended = <0x08 0x0b 0x08 0x09 0x06 0x0b 0x06 0x09 0x04 0x0b 0x04 0x09 0x02 0x0b 0x02 0x09>;
180+
phandle = <0x03>;
181+
riscv,ndev = <0x5f>;
182+
reg = <0x00 0xc000000 0x00 0x600000>;
183+
interrupts-extended = <0x02 0x0b 0x02 0x09>;
246184
interrupt-controller;
247-
compatible = "sifive,plic-1.0.0\0riscv,plic0";
248-
#interrupt-cells = <0x01>;
185+
compatible = "sifive,plic-1.0.0", "riscv,plic0";
249186
#address-cells = <0x00>;
187+
#interrupt-cells = <0x01>;
250188
};
251189

252190
clint@2000000 {
253-
interrupts-extended = <0x08 0x03 0x08 0x07 0x06 0x03 0x06 0x07 0x04 0x03 0x04 0x07 0x02 0x03 0x02 0x07>;
191+
interrupts-extended = <0x02 0x03 0x02 0x07>;
254192
reg = <0x00 0x2000000 0x00 0x10000>;
255-
compatible = "sifive,clint0\0riscv,clint0";
193+
compatible = "sifive,clint0", "riscv,clint0";
194+
};
195+
196+
pci@30000000 {
197+
interrupt-map-mask = <0x1800 0x00 0x00 0x07>;
198+
interrupt-map = <0x00 0x00 0x00 0x01 0x03 0x20 0x00 0x00 0x00 0x02 0x03 0x21 0x00 0x00 0x00 0x03 0x03 0x22 0x00 0x00 0x00 0x04 0x03 0x23 0x800 0x00 0x00 0x01 0x03 0x21 0x800 0x00 0x00 0x02 0x03 0x22 0x800 0x00 0x00 0x03 0x03 0x23 0x800 0x00 0x00 0x04 0x03 0x20 0x1000 0x00 0x00 0x01 0x03 0x22 0x1000 0x00 0x00 0x02 0x03 0x23 0x1000 0x00 0x00 0x03 0x03 0x20 0x1000 0x00 0x00 0x04 0x03 0x21 0x1800 0x00 0x00 0x01 0x03 0x23 0x1800 0x00 0x00 0x02 0x03 0x20 0x1800 0x00 0x00 0x03 0x03 0x21 0x1800 0x00 0x00 0x04 0x03 0x22>;
199+
ranges = <0x1000000 0x00 0x00 0x00 0x3000000 0x00 0x10000 0x2000000 0x00 0x40000000 0x00 0x40000000 0x00 0x40000000 0x3000000 0x04 0x00 0x04 0x00 0x04 0x00>;
200+
reg = <0x00 0x30000000 0x00 0x10000000>;
201+
dma-coherent;
202+
bus-range = <0x00 0xff>;
203+
linux,pci-domain = <0x00>;
204+
device_type = "pci";
205+
compatible = "pci-host-ecam-generic";
206+
#size-cells = <0x02>;
207+
#interrupt-cells = <0x01>;
208+
#address-cells = <0x03>;
256209
};
257210
};
258211
};

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