Skip to content

Commit d11f8b1

Browse files
bcheng0127Artem Gindinson
authored andcommitted
Changes in code.
1 parent 744b0f5 commit d11f8b1

File tree

5 files changed

+200
-336
lines changed

5 files changed

+200
-336
lines changed

visa/GraphColor.cpp

Lines changed: 52 additions & 207 deletions
Original file line numberDiff line numberDiff line change
@@ -2184,7 +2184,7 @@ void Interference::buildInterferenceWithinBB(G4_BB *bb, SparseBitSet &live) {
21842184
if (dst->getBase()->isRegAllocPartaker() &&
21852185
!dst->getBase()->asRegVar()->isPhyRegAssigned()) {
21862186
int dstId = dst->getBase()->asRegVar()->getId();
2187-
lrs[dstId]->setForbidden(forbiddenKind::FBD_LASTGRF);
2187+
lrs[dstId]->markForbidden(kernel.getNumRegTotal() - 1, 1);
21882188
}
21892189
}
21902190
}
@@ -2246,7 +2246,7 @@ void Interference::buildInterferenceWithinBB(G4_BB *bb, SparseBitSet &live) {
22462246
// mark the liveRange as the EOT source
22472247
lrs[id]->setEOTSrc();
22482248
if (builder.hasEOTGRFBinding()) {
2249-
lrs[id]->setForbidden(forbiddenKind::FBD_EOT);
2249+
lrs[id]->markForbidden(0, kernel.getNumRegTotal() - 16);
22502250
}
22512251
}
22522252
if (inst->isReturn()) {
@@ -5256,7 +5256,7 @@ GraphColor::GraphColor(LivenessAnalysis &live, unsigned totalGRF, bool hybrid,
52565256
//
52575257
// lrs[i] gives the live range whose id is i
52585258
//
5259-
void GraphColor::createLiveRanges() {
5259+
void GraphColor::createLiveRanges(unsigned reserveSpillSize) {
52605260
lrs.resize(numVar);
52615261
bool hasStackCall = builder.kernel.fg.getHasStackCalls() ||
52625262
builder.kernel.fg.getIsStackCallFunc();
@@ -5268,6 +5268,7 @@ void GraphColor::createLiveRanges() {
52685268
continue;
52695269
}
52705270
lrs[var->getId()] = new (GCMem) LiveRange(var, this->gra);
5271+
unsigned reservedGRFNum = m_options->getuInt32Option(vISA_ReservedGRFNum);
52715272

52725273
if (builder.kernel.fg.isPseudoDcl(dcl)) {
52735274
lrs[var->getId()]->setIsPseudoNode();
@@ -5283,24 +5284,16 @@ void GraphColor::createLiveRanges() {
52835284
}
52845285
lrs[var->getId()]->setBC(gra.getBankConflict(dcl));
52855286

5286-
if (liveAnalysis.livenessClass(G4_ADDRESS)) {
5287-
lrs[var->getId()]->setForbidden(forbiddenKind::FBD_ADDR);
5288-
} else if (liveAnalysis.livenessClass(G4_FLAG)) {
5289-
lrs[var->getId()]->setForbidden(forbiddenKind::FBD_FLAG);
5290-
} else {
5291-
lrs[var->getId()]->setForbidden(forbiddenKind::FBD_RESERVEDGRF);
5292-
};
5293-
5287+
lrs[var->getId()]->allocForbidden(GCMem, hasStackCall, reserveSpillSize,
5288+
reservedGRFNum);
52945289
lrs[var->getId()]->setCallerSaveBias(hasStackCall);
52955290
G4_Declare *varDcl = lrs[var->getId()]->getDcl();
5296-
if (lrs[var->getId()]->getRegKind() == G4_GRF) {
5297-
if (builder.kernel.fg.isPseudoVCADcl(varDcl)) {
5298-
lrs[var->getId()]->setForbidden(forbiddenKind::FBD_CALLERSAVE);
5299-
} else if (builder.kernel.fg.isPseudoVCEDcl(varDcl)) {
5300-
lrs[var->getId()]->setForbidden(forbiddenKind::FBD_CALLEESAVE);
5301-
} else if (varDcl == gra.getOldFPDcl()) {
5302-
lrs[var->getId()]->setForbidden(forbiddenKind::FBD_CALLERSAVE);
5303-
}
5291+
if (builder.kernel.fg.isPseudoVCADcl(varDcl)) {
5292+
lrs[var->getId()]->allocForbiddenCallerSave(GCMem, &builder.kernel);
5293+
} else if (builder.kernel.fg.isPseudoVCEDcl(varDcl)) {
5294+
lrs[var->getId()]->allocForbiddenCalleeSave(GCMem, &builder.kernel);
5295+
} else if (varDcl == gra.getOldFPDcl()) {
5296+
lrs[var->getId()]->allocForbiddenCallerSave(GCMem, &builder.kernel);
53045297
}
53055298
}
53065299
}
@@ -5988,7 +5981,7 @@ bool GraphColor::assignColors(ColorHeuristic colorHeuristicGRF,
59885981
i != (parentGRFNum + parentNumRows); i += numRows) {
59895982
if ((i - parentGRFNum) == siblingNum * numRows)
59905983
continue;
5991-
lr->markForbidden(GCMem, i, numRows);
5984+
lr->markForbidden(i, numRows);
59925985
}
59935986
skipParentIntf = true;
59945987
}
@@ -6677,8 +6670,8 @@ void GraphColor::gatherScatterForbiddenWA() {
66776670
if (opndLen > 0 && dcl && dcl->getRegVar() &&
66786671
dcl->getRegVar()->isRegAllocPartaker()) {
66796672
if (lenInSend == (opndLen + 1)) {
6680-
lrs[dcl->getRegVar()->getId()]->setForbidden(
6681-
forbiddenKind::FBD_LASTGRF);
6673+
lrs[dcl->getRegVar()->getId()]->markForbidden(
6674+
kernel.getNumRegTotal() - 1, 1);
66826675
} else if (lenInSend > opndLen) {
66836676
vISA_ASSERT(false,
66846677
"mismatch between len in send and that of operand");
@@ -6694,19 +6687,38 @@ void GraphColor::gatherScatterForbiddenWA() {
66946687
}
66956688

66966689
bool GraphColor::regAlloc(bool doBankConflictReduction,
6697-
bool highInternalConflict, const RPE *rpe) {
6690+
bool highInternalConflict, bool reserveSpillReg,
6691+
unsigned &spillRegSize, unsigned &indrSpillRegSize,
6692+
const RPE *rpe) {
66986693
bool useSplitLLRHeuristic = false;
66996694

67006695
RA_TRACE(std::cout << "\t--# variables: " << liveAnalysis.getNumSelectedVar()
67016696
<< "\n");
67026697

6698+
unsigned reserveSpillSize = 0;
6699+
if (reserveSpillReg) {
6700+
failSafeIter = reserveSpillReg;
6701+
6702+
if (kernel.getOption(vISA_NewFailSafeRA)) {
6703+
spillRegSize = gra.getNumReservedGRFs();
6704+
indrSpillRegSize = 0;
6705+
} else {
6706+
gra.determineSpillRegSize(spillRegSize, indrSpillRegSize);
6707+
}
6708+
6709+
reserveSpillSize = spillRegSize + indrSpillRegSize;
6710+
vISA_ASSERT(reserveSpillSize < kernel.getNumCalleeSaveRegs(),
6711+
"Invalid reserveSpillSize in fail-safe RA!");
6712+
totalGRFRegCount -= reserveSpillSize;
6713+
}
6714+
67036715
// Copy over alignment for vars inserted by RA
67046716
gra.copyMissingAlignment();
67056717

67066718
//
67076719
// create an array of live ranges.
67086720
//
6709-
createLiveRanges();
6721+
createLiveRanges(reserveSpillSize);
67106722
//
67116723
// set the pre-assigned registers
67126724
//
@@ -8034,141 +8046,6 @@ void GraphColor::getSaveRestoreRegister() {
80348046
}
80358047
getCallerSaveRegisters();
80368048
}
8037-
8038-
//
8039-
// Get the forbidden vector size
8040-
//
8041-
unsigned ForbiddenRegs::getForbiddenVectorSize(G4_RegFileKind regKind) const {
8042-
switch (regKind) {
8043-
case G4_GRF:
8044-
case G4_INPUT:
8045-
return builder.kernel.getNumRegTotal();
8046-
case G4_ADDRESS:
8047-
return getNumAddrRegisters();
8048-
case G4_FLAG:
8049-
return builder.getNumFlagRegisters();
8050-
default:
8051-
vISA_ASSERT_UNREACHABLE("illegal reg file");
8052-
return 0;
8053-
}
8054-
}
8055-
8056-
//
8057-
// Get the forbidden vectors of reserved GRFs
8058-
// May be reserved for user, stack call, and spill
8059-
//
8060-
void ForbiddenRegs::generateReservedGRFForbidden(
8061-
unsigned reserveSpillSize) {
8062-
bool hasStackCall = builder.kernel.fg.getHasStackCalls() ||
8063-
builder.kernel.fg.getIsStackCallFunc();
8064-
uint32_t reservedGRFNum = builder.getuint32Option(vISA_ReservedGRFNum);
8065-
unsigned int stackCallRegSize =
8066-
hasStackCall ? builder.kernel.numReservedABIGRF() : 0;
8067-
8068-
// r0 - Forbidden when platform is not 3d
8069-
// rMax, rMax-1, rMax-2 - Forbidden in presence of stack call sites
8070-
forbiddenKind k = forbiddenKind::FBD_RESERVEDGRF;
8071-
unsigned totalGRFNum = builder.kernel.getNumRegTotal();
8072-
forbiddenVec[(size_t)k].resize(getForbiddenVectorSize(G4_GRF));
8073-
forbiddenVec[(size_t)k].clear();
8074-
8075-
if (builder.kernel.getKernelType() != VISA_3D ||
8076-
builder.kernel.getOption(vISA_enablePreemption) ||
8077-
reserveSpillSize > 0 || builder.kernel.getOption(vISA_ReserveR0) ||
8078-
builder.kernel.getOption(vISA_PreserveR0InR0)) {
8079-
forbiddenVec[(size_t)k].set(0, true);
8080-
}
8081-
8082-
if (builder.kernel.getOption(vISA_enablePreemption)) {
8083-
// r1 is reserved for SIP kernel
8084-
forbiddenVec[(size_t)k].set(1, true);
8085-
}
8086-
8087-
unsigned reservedRegSize = stackCallRegSize + reserveSpillSize;
8088-
for (unsigned int i = 0; i < reservedRegSize; i++) {
8089-
forbiddenVec[(size_t)k].set(totalGRFNum - 1 - i, true);
8090-
}
8091-
8092-
unsigned largestNoneReservedReg = totalGRFNum - reservedRegSize - 1;
8093-
if (totalGRFNum - reservedRegSize >= totalGRFNum - 16) {
8094-
largestNoneReservedReg = totalGRFNum - 16 - 1;
8095-
}
8096-
8097-
if (totalGRFNum - reservedRegSize < reservedGRFNum) {
8098-
vISA_ASSERT(false, "After reservation, there is not enough regiser!");
8099-
}
8100-
8101-
for (unsigned int i = 0; i < reservedGRFNum; i++) {
8102-
forbiddenVec[(size_t)k].set(largestNoneReservedReg - i, true);
8103-
}
8104-
}
8105-
8106-
// ETO use only last 16 registers
8107-
void ForbiddenRegs::generateEOTGRFForbidden() {
8108-
forbiddenVec[(size_t)forbiddenKind::FBD_EOT].resize(
8109-
getForbiddenVectorSize(G4_GRF));
8110-
forbiddenVec[(size_t)forbiddenKind::FBD_EOT].clear();
8111-
for (unsigned i = 0; i < builder.kernel.getNumRegTotal() - 16; i++) {
8112-
forbiddenVec[(size_t)forbiddenKind::FBD_EOT].set(i, true);
8113-
}
8114-
forbiddenVec[(size_t)forbiddenKind::FBD_EOT] |=
8115-
forbiddenVec[(size_t)forbiddenKind::FBD_RESERVEDGRF];
8116-
}
8117-
8118-
void ForbiddenRegs::generateLastGRFForbidden() {
8119-
forbiddenVec[(size_t)forbiddenKind::FBD_LASTGRF].resize(
8120-
getForbiddenVectorSize(G4_GRF));
8121-
forbiddenVec[(size_t)forbiddenKind::FBD_LASTGRF].clear();
8122-
forbiddenVec[(size_t)forbiddenKind::FBD_LASTGRF].set(
8123-
builder.kernel.getNumRegTotal() - 1, true);
8124-
forbiddenVec[(size_t)forbiddenKind::FBD_LASTGRF] |=
8125-
forbiddenVec[(size_t)forbiddenKind::FBD_RESERVEDGRF];
8126-
}
8127-
8128-
void ForbiddenRegs::generateEOTLastGRFForbidden() {
8129-
forbiddenVec[(size_t)forbiddenKind::FBD_EOTLASTGRF].resize(
8130-
getForbiddenVectorSize(G4_GRF));
8131-
forbiddenVec[(size_t)forbiddenKind::FBD_EOTLASTGRF].clear();
8132-
forbiddenVec[(size_t)forbiddenKind::FBD_EOTLASTGRF] |=
8133-
forbiddenVec[(size_t)forbiddenKind::FBD_EOT];
8134-
forbiddenVec[(size_t)forbiddenKind::FBD_EOTLASTGRF] |=
8135-
forbiddenVec[(size_t)forbiddenKind::FBD_LASTGRF];
8136-
}
8137-
8138-
8139-
//
8140-
// mark forbidden registers for caller-save pseudo var
8141-
//
8142-
void ForbiddenRegs::generateCallerSaveGRFForbidden() {
8143-
unsigned int startCalleeSave = builder.kernel.calleeSaveStart();
8144-
unsigned int endCalleeSave =
8145-
startCalleeSave + builder.kernel.getNumCalleeSaveRegs();
8146-
// r60-r124 are caller save regs for SKL
8147-
forbiddenVec[(size_t)forbiddenKind::FBD_CALLERSAVE].resize(
8148-
getForbiddenVectorSize(G4_GRF));
8149-
forbiddenVec[(size_t)forbiddenKind::FBD_CALLERSAVE].clear();
8150-
for (unsigned int i = startCalleeSave; i < endCalleeSave; i++) {
8151-
forbiddenVec[(size_t)forbiddenKind::FBD_CALLERSAVE].set(i, true);
8152-
}
8153-
forbiddenVec[(size_t)forbiddenKind::FBD_CALLERSAVE] |=
8154-
forbiddenVec[(size_t)forbiddenKind::FBD_RESERVEDGRF];
8155-
}
8156-
8157-
//
8158-
// mark forbidden registers for callee-save pseudo var
8159-
//
8160-
void ForbiddenRegs::generateCalleeSaveGRFForbidden() {
8161-
unsigned int numCallerSaveGRFs = builder.kernel.getCallerSaveLastGRF() + 1;
8162-
forbiddenVec[(size_t)forbiddenKind::FBD_CALLEESAVE].resize(
8163-
getForbiddenVectorSize(G4_GRF));
8164-
forbiddenVec[(size_t)forbiddenKind::FBD_CALLEESAVE].clear();
8165-
for (unsigned int i = 1; i < numCallerSaveGRFs; i++) {
8166-
forbiddenVec[(size_t)forbiddenKind::FBD_CALLEESAVE].set(i, true);
8167-
}
8168-
forbiddenVec[(size_t)forbiddenKind::FBD_CALLEESAVE] |=
8169-
forbiddenVec[(size_t)forbiddenKind::FBD_RESERVEDGRF];
8170-
}
8171-
81728049
//
81738050
// Add GRF caller/callee save/restore code for stack calls.
81748051
// localSpillAreaOwordsize specifices the starting offset of the
@@ -9321,7 +9198,10 @@ void GlobalRA::addrRegAlloc() {
93219198
//
93229199
if (liveAnalysis.getNumSelectedVar() > 0) {
93239200
GraphColor coloring(liveAnalysis, kernel.getNumRegTotal(), false, false);
9324-
if (!coloring.regAlloc(false, false, nullptr)) {
9201+
unsigned spillRegSize = 0;
9202+
unsigned indrSpillRegSize = 0;
9203+
if (!coloring.regAlloc(false, false, false, spillRegSize,
9204+
indrSpillRegSize, nullptr)) {
93259205
SpillManager spillARF(*this, coloring.getSpilledLiveRanges(),
93269206
addrSpillId);
93279207
spillARF.insertSpillCode();
@@ -9383,7 +9263,10 @@ void GlobalRA::flagRegAlloc() {
93839263
//
93849264
if (liveAnalysis.getNumSelectedVar() > 0) {
93859265
GraphColor coloring(liveAnalysis, kernel.getNumRegTotal(), false, false);
9386-
if (!coloring.regAlloc(false, false, nullptr)) {
9266+
unsigned spillRegSize = 0;
9267+
unsigned indrSpillRegSize = 0;
9268+
if (!coloring.regAlloc(false, false, false, spillRegSize,
9269+
indrSpillRegSize, nullptr)) {
93879270
SpillManager spillFlag(*this, coloring.getSpilledLiveRanges(),
93889271
flagSpillId);
93899272
spillFlag.insertSpillCode();
@@ -9550,8 +9433,12 @@ bool GlobalRA::hybridRA(bool doBankConflictReduction, bool highInternalConflict,
95509433
}
95519434

95529435
GraphColor coloring(liveAnalysis, kernel.getNumRegTotal(), true, false);
9436+
9437+
unsigned spillRegSize = 0;
9438+
unsigned indrSpillRegSize = 0;
95539439
bool isColoringGood =
9554-
coloring.regAlloc(doBankConflictReduction, highInternalConflict, &rpe);
9440+
coloring.regAlloc(doBankConflictReduction, highInternalConflict, false,
9441+
spillRegSize, indrSpillRegSize, &rpe);
95559442
if (!isColoringGood) {
95569443
if (!kernel.getOption(vISA_Debug)) {
95579444
// Why?? Keep LRA results when -debug is passed
@@ -9590,41 +9477,6 @@ bool canDoHRA(G4_Kernel &kernel) {
95909477

95919478
return ret;
95929479
}
9593-
9594-
9595-
std::pair<unsigned, unsigned> GlobalRA::reserveGRFSpillReg(GraphColor &coloring) {
9596-
coloring.markFailSafeIter(true);
9597-
unsigned spillRegSize = 0;
9598-
unsigned indrSpillRegSize = 0;
9599-
9600-
if (kernel.getOption(vISA_NewFailSafeRA)) {
9601-
spillRegSize = getNumReservedGRFs();
9602-
} else {
9603-
determineSpillRegSize(spillRegSize, indrSpillRegSize);
9604-
}
9605-
9606-
vISA_ASSERT(spillRegSize + indrSpillRegSize < kernel.getNumCalleeSaveRegs(),
9607-
"Invalid reserveSpillSize in fail-safe RA!");
9608-
coloring.setTotalGRFRegCount(coloring.getTotalGRFRegCount() -
9609-
(spillRegSize + indrSpillRegSize));
9610-
return std::make_pair(spillRegSize, indrSpillRegSize);
9611-
}
9612-
9613-
// pre-allocate the bits for forbidden registers which will not be used in
9614-
// register assignment.
9615-
// Genernal GRF forbidden including:
9616-
// reserved for spill,
9617-
// user reserved,
9618-
// reserved for stack call.
9619-
void GlobalRA::generateForbiddenTemplates(unsigned reserveSpillSize) {
9620-
fbdRegs.generateReservedGRFForbidden(reserveSpillSize);
9621-
fbdRegs.generateCallerSaveGRFForbidden();
9622-
fbdRegs.generateCalleeSaveGRFForbidden();
9623-
fbdRegs.generateEOTGRFForbidden();
9624-
fbdRegs.generateLastGRFForbidden();
9625-
fbdRegs.generateEOTLastGRFForbidden();
9626-
}
9627-
96289480
//
96299481
// graph coloring entry point. returns nonzero if RA fails
96309482
//
@@ -9714,7 +9566,7 @@ int GlobalRA::coloringRegAlloc() {
97149566
LivenessAnalysis live(*this, G4_GRF | G4_INPUT, false, true);
97159567
live.computeLiveness();
97169568
GraphColor coloring(live, kernel.getNumRegTotal(), false, false);
9717-
coloring.createLiveRanges();
9569+
coloring.createLiveRanges(0);
97189570
const auto& lrs = coloring.getLiveRanges();
97199571
Interference intf(&live, lrs, live.getNumSelectedVar(),
97209572
live.getNumSplitStartID(), live.getNumSplitVar(),
@@ -9966,18 +9818,11 @@ int GlobalRA::coloringRegAlloc() {
99669818
coloring.dumpRegisterPressure();
99679819
}
99689820

9969-
// Get the size of register which are reserved for spill
99709821
unsigned spillRegSize = 0;
99719822
unsigned indrSpillRegSize = 0;
9972-
9973-
if (reserveSpillReg) {
9974-
std::pair <unsigned, unsigned> p = reserveGRFSpillReg(coloring);
9975-
spillRegSize = p.first;
9976-
indrSpillRegSize = p.second;
9977-
}
9978-
generateForbiddenTemplates(spillRegSize + indrSpillRegSize);
99799823
bool isColoringGood = coloring.regAlloc(
9980-
doBankConflictReduction, highInternalConflict, &rpe);
9824+
doBankConflictReduction, highInternalConflict, reserveSpillReg,
9825+
spillRegSize, indrSpillRegSize, &rpe);
99819826
if (!isColoringGood) {
99829827
if (isReRAPass()) {
99839828
// Don't modify program if reRA pass spills

0 commit comments

Comments
 (0)