Internal changes

Internal changes

Author: jaladreips

IGC/Compiler/tests/EmitVISAPass/vectorizer-vector-emission-fadd.ll

@@ -361,7 +361,7 @@ declare <8 x float> @llvm.genx.GenISA.sub.group.dpas.v8f32.v8f32.v8i16.v8i32(<8
 !324 = !{!"WaDisableVRS", i1 false}
 !325 = !{!"RelaxMemoryVisibilityFromPSOrdering", i1 false}
 !326 = !{!"WaEnableVMaskUnderNonUnifromCF", i1 false}
-!327 = !{!"csInfo", !328, !329, !330, !331, !332, !33, !34, !333, !334, !335, !336, !337, !338, !339, !340, !341, !342, !343, !344, !345, !66, !346, !347, !348, !349, !350, !351, !352}
+!327 = !{!"csInfo", !328, !329, !330, !331, !332, !33, !34, !333, !334, !335, !336, !337, !338, !339, !340, !341, !342, !343, !344, !345, !66, !346, !347, !348, !349, !351, !352}
 !328 = !{!"maxWorkGroupSize", i32 0}
 !329 = !{!"waveSize", i32 0}
 !330 = !{!"ComputeShaderSecondCompile"}
@@ -384,7 +384,6 @@ declare <8 x float> @llvm.genx.GenISA.sub.group.dpas.v8f32.v8f32.v8i16.v8i32(<8
 !347 = !{!"walkOrderEnabled", i1 false}
 !348 = !{!"walkOrderOverride", i32 0}
 !349 = !{!"ResForHfPacking"}
-!350 = !{!"hasWaveMatrix", i1 false}
 !351 = !{!"constantFoldSimdSize", i1 false}
 !352 = !{!"isNodeShader", i1 false}
 !353 = !{!"msInfo", !354, !355, !356, !357, !358, !359, !360, !361, !362, !363, !364, !312, !310, !365}

IGC/Compiler/tests/EmitVISAPass/vectorizer-vector-emission-fmul.ll

@@ -362,7 +362,7 @@ declare <8 x float> @llvm.genx.GenISA.sub.group.dpas.v8f32.v8f32.v8i16.v8i32(<8
 !324 = !{!"WaDisableVRS", i1 false}
 !325 = !{!"RelaxMemoryVisibilityFromPSOrdering", i1 false}
 !326 = !{!"WaEnableVMaskUnderNonUnifromCF", i1 false}
-!327 = !{!"csInfo", !328, !329, !330, !331, !332, !33, !34, !333, !334, !335, !336, !337, !338, !339, !340, !341, !342, !343, !344, !345, !66, !346, !347, !348, !349, !350, !351, !352}
+!327 = !{!"csInfo", !328, !329, !330, !331, !332, !33, !34, !333, !334, !335, !336, !337, !338, !339, !340, !341, !342, !343, !344, !345, !66, !346, !347, !348, !349, !351, !352}
 !328 = !{!"maxWorkGroupSize", i32 0}
 !329 = !{!"waveSize", i32 0}
 !330 = !{!"ComputeShaderSecondCompile"}
@@ -385,7 +385,6 @@ declare <8 x float> @llvm.genx.GenISA.sub.group.dpas.v8f32.v8f32.v8i16.v8i32(<8
 !347 = !{!"walkOrderEnabled", i1 false}
 !348 = !{!"walkOrderOverride", i32 0}
 !349 = !{!"ResForHfPacking"}
-!350 = !{!"hasWaveMatrix", i1 false}
 !351 = !{!"constantFoldSimdSize", i1 false}
 !352 = !{!"isNodeShader", i1 false}
 !353 = !{!"msInfo", !354, !355, !356, !357, !358, !359, !360, !361, !362, !363, !364, !312, !310, !365}

IGC/Compiler/tests/EmitVISAPass/vectorizer-vector-emission-fptrunc.ll

@@ -371,7 +371,7 @@ attributes #0 = { nofree nosync nounwind readnone speculatable willreturn }
 !327 = !{!"WaDisableVRS", i1 false}
 !328 = !{!"RelaxMemoryVisibilityFromPSOrdering", i1 false}
 !329 = !{!"WaEnableVMaskUnderNonUnifromCF", i1 false}
-!330 = !{!"csInfo", !331, !332, !333, !334, !335, !32, !33, !336, !337, !338, !339, !340, !341, !342, !343, !344, !345, !346, !347, !348, !65, !349, !350, !351, !352, !353, !354, !355, !356, !357}
+!330 = !{!"csInfo", !331, !332, !333, !334, !335, !32, !33, !336, !337, !338, !339, !340, !341, !342, !343, !344, !345, !346, !347, !348, !65, !349, !350, !351, !352, !354, !355, !356, !357}
 !331 = !{!"maxWorkGroupSize", i32 0}
 !332 = !{!"waveSize", i32 0}
 !333 = !{!"ComputeShaderSecondCompile"}
@@ -394,7 +394,6 @@ attributes #0 = { nofree nosync nounwind readnone speculatable willreturn }
 !350 = !{!"walkOrderEnabled", i1 false}
 !351 = !{!"walkOrderOverride", i32 0}
 !352 = !{!"ResForHfPacking"}
-!353 = !{!"hasWaveMatrix", i1 false}
 !354 = !{!"constantFoldSimdSize", i1 false}
 !355 = !{!"isNodeShader", i1 false}
 !356 = !{!"threadGroupMergeSize", i32 0}