Skip to content

Commit c06c782

Browse files
vsemenov368igcbot
authored andcommitted
Enable Xe3p in VISA
.
1 parent 23f5a4a commit c06c782

Some content is hidden

Large Commits have some content hidden by default. Use the searchbox below for content that may be hidden.

80 files changed

+16386
-432
lines changed

IGC/Compiler/CISACodeGen/EmitVISAPass.cpp

Lines changed: 9 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -22825,8 +22825,15 @@ void EmitPass::emitLscIntrinsicTypedLoadStatus(llvm::GenIntrinsicInst *inst) {
2282522825

2282622826
LSC_ADDR_SIZE addrSize = LSC_ADDR_SIZE_32b;
2282722827
const unsigned int eltBitSize = 32;
22828-
const unsigned int numElements = 1;
22829-
const LSC_OP lscOp = LSC_LOAD_STATUS;
22828+
const bool isEfficient64bEnabled = m_currShader->m_Platform->hasEfficient64bEnabled();
22829+
const unsigned int numElements =
22830+
isEfficient64bEnabled ? numLanes(m_currShader->m_SIMDSize)
22831+
: 1; // The dest data payload is dword per SIMT lane/bit per SIMT lane (one dword).
22832+
if (isEfficient64bEnabled && resource.m_isStatefulForEfficient64b) {
22833+
// stateful access for efficient64b -> 64bit pointer with 32bit offset
22834+
addrSize = LSC_ADDR_SIZE_32bU;
22835+
}
22836+
const LSC_OP lscOp = isEfficient64bEnabled ? LSC_LOAD_QUAD_STATUS : LSC_LOAD_STATUS;
2283022837
if (destIsUniform) {
2283122838
m_encoder->SetSimdSize(SIMDMode::SIMD1);
2283222839
m_encoder->SetPredicate(nullptr);

0 commit comments

Comments
 (0)