Skip to content

Commit ae3f6d6

Browse files
DianaChengfxbot
DianaChen
authored and
gfxbot
committed
IGA: Clean up unused encoder options
Change-Id: I53ba1da6e26c35fdac39e9da6f41f0124227eb80
1 parent cca04b2 commit ae3f6d6

File tree

11 files changed

+30
-57
lines changed

11 files changed

+30
-57
lines changed

‎visa/BinaryEncodingIGA.cpp‎

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -471,7 +471,7 @@ void BinaryEncodingIGA::DoAll()
471471

472472
// Make the size of the first BB is multiple of 4 instructions, and do not compact
473473
// any instructions in it, so that the size of the first BB is multiple of 64 bytes
474-
if (kernel.fg.builder->getHasPerThreadProlog())
474+
if (kernel.fg.builder->getHasPerThreadProlog())
475475
{
476476
G4_BB* first_bb = *kernel.fg.begin();
477477
size_t num_inst = first_bb->getInstList().size();

‎visa/iga/GEDLibrary/GED_external/Source/common/version.cpp‎

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -24,4 +24,4 @@ SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
2424
2525
======================= end_copyright_notice ==================================*/
2626

27-
const char* gedVersion = "0.26.1 (20bb3939)";
27+
const char* gedVersion = "0.27 (bc3a4c75)";

‎visa/iga/IGALibrary/Backend/EncoderOpts.hpp‎

Lines changed: 0 additions & 6 deletions
Original file line numberDiff line numberDiff line change
@@ -33,9 +33,6 @@ namespace iga
3333
bool explicitCompactMissIsWarning;
3434
bool ignoreNoCompactFormFound;
3535

36-
// fisrtBB64ByteSize - add padding to the first BB to make sure its size is multiple of 64 byte
37-
bool fisrtBB64ByteSize = false;
38-
3936

4037
EncoderOpts(
4138
bool _autoCompact = false,
@@ -44,9 +41,6 @@ namespace iga
4441
: autoCompact(_autoCompact)
4542
, explicitCompactMissIsWarning(_explicitCompactMissIsWarning)
4643
{ }
47-
48-
void setFisrtBB64ByteSize(bool enable = true)
49-
{ fisrtBB64ByteSize = enable; };
5044
};
5145
}
5246

‎visa/iga/IGALibrary/Backend/GED/Decoder.cpp‎

Lines changed: 5 additions & 5 deletions
Original file line numberDiff line numberDiff line change
@@ -724,7 +724,7 @@ void DecoderBase::decodeTernaryDestinationAlign16(Instruction *inst)
724724

725725
GED_DECODE_RAW(uint32_t, subRegNumBytes, DstSubRegNum);
726726
uint8_t subRegNumber = type == Type::INVALID ?
727-
0 : binNumToSubRegNum((uint8_t)subRegNumBytes, regName, type, true);
727+
0 : binNumToSubRegNum((uint8_t)subRegNumBytes, regName, type);
728728
regRef.subRegNum = (uint8_t)(subRegNumber + subregOffAlign16Elems);
729729
inst->setDirectDestination(
730730
dstMod,
@@ -780,7 +780,7 @@ void DecoderBase::decodeTernarySourceAlign16(Instruction *inst)
780780
type);
781781
} else {
782782
int subReg = type == Type::INVALID ?
783-
0 : binNumToSubRegNum(decodeSrcSubRegNum<S>(), RegName::GRF_R, type, true);
783+
0 : binNumToSubRegNum(decodeSrcSubRegNum<S>(), RegName::GRF_R, type);
784784
RegRef reg = {
785785
(uint8_t)regNum,
786786
(uint8_t)subReg
@@ -1494,8 +1494,7 @@ void DecoderBase::decodeDstDirSubRegNum(DirRegOpInfo& dri)
14941494

14951495
GED_DECODE_RAW(uint32_t, subRegNum, DstSubRegNum);
14961496
dri.regRef.subRegNum =
1497-
binNumToSubRegNum((uint8_t)subRegNum, dri.regName, scalingType,
1498-
m_opSpec->isBranching() || m_opSpec->isTernary());
1497+
binNumToSubRegNum((uint8_t)subRegNum, dri.regName, scalingType);
14991498
}
15001499
}
15011500

@@ -1820,8 +1819,9 @@ DecoderBase::decodeTernarySrcImmVal(Type t)
18201819
}
18211820

18221821
uint32_t DecoderBase::binNumToSubRegNum(
1823-
uint32_t binNum, RegName regName, Type type, bool isTernaryOrBranch)
1822+
uint32_t binNum, RegName regName, Type type)
18241823
{
1824+
18251825
return BytesOffsetToSubReg(binNum, regName, type);
18261826
}
18271827

‎visa/iga/IGALibrary/Backend/GED/Decoder.hpp‎

Lines changed: 3 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -287,7 +287,8 @@ namespace iga
287287

288288
dri.regRef.subRegNum = binNumToSubRegNum(
289289
dri.regRef.subRegNum, dri.regName,
290-
scalingType, m_opSpec->isBranching() || m_opSpec->isTernary());
290+
scalingType);
291+
291292

292293
return dri;
293294
}
@@ -313,7 +314,7 @@ namespace iga
313314

314315
// Translate Sub register from binary encoding number to asm number
315316
uint32_t binNumToSubRegNum(
316-
uint32_t binNum, RegName regName, Type type, bool isTernaryOrBranch);
317+
uint32_t binNum, RegName regName, Type type);
317318

318319
protected:
319320
GED_MODEL m_gedModel;

‎visa/iga/IGALibrary/Backend/GED/Encoder.cpp‎

Lines changed: 0 additions & 18 deletions
Original file line numberDiff line numberDiff line change
@@ -80,24 +80,6 @@ EncoderBase::EncoderBase(
8080

8181
void EncoderBase::encodeKernelPreProcess(Kernel &k)
8282
{
83-
if (m_opts.fisrtBB64ByteSize && !k.getBlockList().empty()) {
84-
int32_t inst_size = 16;
85-
Block& blk = **k.getBlockList().begin();
86-
// To simplify the size calculation, we do not compact the instructions
87-
// Add NOP until the block size is multiple of 64
88-
size_t padding_size = blk.getInstList().size() * inst_size % 64;
89-
if (padding_size != 0) {
90-
padding_size = 64 - padding_size;
91-
assert(padding_size % inst_size == 0);
92-
size_t num_nop = padding_size / inst_size;
93-
// create inst
94-
for (size_t i = 0; i < num_nop; ++i)
95-
blk.getInstList().push_back(k.createNopInstruction());
96-
}
97-
for (auto inst : blk.getInstList())
98-
inst->addInstOpt(InstOpt::NOCOMPACT);
99-
}
100-
10183
doEncodeKernelPreProcess(k);
10284
}
10385

‎visa/iga/IGALibrary/IR/IRChecker.cpp‎

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -283,7 +283,7 @@ struct SemanticChecker : LOCChecker {
283283
if (execSize * srcTypeSz > restric_size) {
284284
warning(
285285
"register regioning restriction warning: "
286-
"ExecSize * sizeof(Type) exceeds 64 bytes\n"
286+
"ExecSize * sizeof(Type) exceeds 2 GRF\n"
287287
"see Programmer's Reference Manual (Restriction 1.1)");
288288
}
289289
// Restriction 1.2:

‎visa/iga/IGALibrary/IR/Types.hpp‎

Lines changed: 10 additions & 10 deletions
Original file line numberDiff line numberDiff line change
@@ -47,16 +47,16 @@ enum class Platform
4747
#define IGA_GEN_VER_ORDINAL(MAJ,MIN) (((MAJ)<<16)|(MIN))
4848
INVALID = 0,
4949

50-
GEN6 = IGA_GEN_VER_ORDINAL( 6, 0),
51-
GEN7 = IGA_GEN_VER_ORDINAL( 7, 0),
52-
GEN7P5 = IGA_GEN_VER_ORDINAL( 7, 5),
53-
GEN8 = IGA_GEN_VER_ORDINAL( 8, 0),
54-
GEN8LP = IGA_GEN_VER_ORDINAL( 8, 1),
55-
GEN9 = IGA_GEN_VER_ORDINAL( 9, 0),
56-
GEN9LP = IGA_GEN_VER_ORDINAL( 9, 1),
57-
GEN9P5 = IGA_GEN_VER_ORDINAL( 9, 5),
58-
GEN10 = IGA_GEN_VER_ORDINAL(10, 0),
59-
GEN11 = IGA_GEN_VER_ORDINAL(11, 0),
50+
GEN6 = IGA_GEN_VER_ORDINAL( 6, 0 ),
51+
GEN7 = IGA_GEN_VER_ORDINAL( 7, 0 ),
52+
GEN7P5 = IGA_GEN_VER_ORDINAL( 7, 5 ),
53+
GEN8 = IGA_GEN_VER_ORDINAL( 8, 0 ),
54+
GEN8LP = IGA_GEN_VER_ORDINAL( 8, 1 ),
55+
GEN9 = IGA_GEN_VER_ORDINAL( 9, 0 ),
56+
GEN9LP = IGA_GEN_VER_ORDINAL( 9, 1 ),
57+
GEN9P5 = IGA_GEN_VER_ORDINAL( 9, 5 ),
58+
GEN10 = IGA_GEN_VER_ORDINAL(10, 0 ),
59+
GEN11 = IGA_GEN_VER_ORDINAL(11, 0 ),
6060
GENNEXT = IGA_GEN_VER_ORDINAL(12, 0)
6161

6262
#undef IGA_GEN_VER_ORDINAL

‎visa/iga/IGALibrary/api/iga.cpp‎

Lines changed: 9 additions & 9 deletions
Original file line numberDiff line numberDiff line change
@@ -82,15 +82,15 @@ struct PlatformEntry {
8282
};
8383

8484
static const PlatformEntry ALL_PLATFORMS[] {
85-
{IGA_GEN7, iga::Platform::GEN7, "7" },
86-
{IGA_GEN7p5, iga::Platform::GEN7P5, "7p5" },
87-
{IGA_GEN8, iga::Platform::GEN8, "8" },
88-
{IGA_GEN8lp, iga::Platform::GEN8LP, "8lp" },
89-
{IGA_GEN9, iga::Platform::GEN9, "9" },
90-
{IGA_GEN9lp, iga::Platform::GEN9LP, "9lp" },
91-
{IGA_GEN9p5, iga::Platform::GEN9P5, "9p5" },
92-
{IGA_GEN10, iga::Platform::GEN10, "10" },
93-
{IGA_GEN11, iga::Platform::GEN11, "11" },
85+
{IGA_GEN7, iga::Platform::GEN7, "7" },
86+
{IGA_GEN7p5, iga::Platform::GEN7P5, "7p5" },
87+
{IGA_GEN8, iga::Platform::GEN8, "8" },
88+
{IGA_GEN8lp, iga::Platform::GEN8LP, "8lp" },
89+
{IGA_GEN9, iga::Platform::GEN9, "9" },
90+
{IGA_GEN9lp, iga::Platform::GEN9LP, "9lp" },
91+
{IGA_GEN9p5, iga::Platform::GEN9P5, "9p5" },
92+
{IGA_GEN10, iga::Platform::GEN10, "10" },
93+
{IGA_GEN11, iga::Platform::GEN11, "11" },
9494
};
9595

9696
// conversion to an internal platform

‎visa/iga/IGALibrary/api/igaEncoderWrapper.cpp‎

Lines changed: 0 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -12,7 +12,6 @@ iga_status_t KernelEncoder::encode()
1212
m_autoCompact,
1313
true
1414
);
15-
enc_opt.setFisrtBB64ByteSize(m_fisrtBB64ByteSize);
1615

1716
Encoder enc(m_kernel->getModel(), errHandler, enc_opt);
1817
enc.encodeKernel(

0 commit comments

Comments
 (0)