Changes in code.

Change-Id: I029f352efbdedd96b9dcda3af6c6cfe31cfb74cd

Author: bcheng0127

visa/Gen4_IR.cpp

@@ -8355,8 +8355,7 @@ bool G4_INST::isRMWCombinCandidate(G4_INST *next)
     G4_Operand* nextDst = next->getDst();
     //The current instruction must has Integer macro dst as well
     if (nextDst &&
-        nextDst->isGen12IntegerMacroDst() &&
-        dst->getType() == nextDst->getType())
+        nextDst->isGen12IntegerMacroDst())
     {
 
         unsigned short lastLB = (unsigned short)dst->getLinearizedStart();

visa/Gen4_IR.hpp

@@ -2334,10 +2334,7 @@ class G4_Operand
         if (type == Type_UW ||
             type == Type_W ||
             type == Type_B ||
-            type == Type_UB ||
-            type == Type_D ||
-            type == Type_UD
-            )
+            type == Type_UB)
         {
             return true;
         }