GRF register info dump

Change-Id: I2884d96d91651f7894868fae4ad796b4b28f7641

Author: bcheng0127

visa/FlowGraph.h

@@ -470,6 +470,7 @@ class G4_BB
     uint32_t emitBankConflictGen12lp(std::ostream & os_output, G4_INST * inst, int * suppressRegs, int * lastRegs, int & sameConflictTimes, int & twoSrcConflicts, int & simd16RS);
     uint32_t countReadModifyWrite(std::ostream& os_output, G4_INST *inst);
     uint32_t emitBankConflictGen12(std::ostream & os_output, G4_INST * inst, int * suppressRegs, int & sameConflictTimes, int & twoSrcConflicts, int & simd16RS, bool zeroOne, bool isTGLLP);
+    void emitRegInfo(std::ostream& output, G4_INST* inst, int offset);
     void emitDepInfo(std::ostream& output, G4_INST *inst, int offset);
 
     bool isEndWithCall() const { return getLastOpcode() == G4_call; }
@@ -1552,6 +1553,8 @@ class G4_Kernel
     void setName(const char* n) { name = n; }
     const char* getName() { return name; }
     void emit_asm(std::ostream& output, bool beforeRegAlloc, void * binary, uint32_t binarySize);
+    void emit_RegInfo();
+    void emit_RegInfoKernel(std::ostream& output);
     void emit_dep(std::ostream& output);
 
     void setKernelParameters(void);

visa/LocalScheduler/SWSB_G4IR.cpp

@@ -5856,6 +5856,50 @@ void G4_BB_SB::createAddGRFEdge(SBNode* pred, SBNode* succ, DepType d, SBDepende
     return;
 }
 
+void G4_Kernel::emit_RegInfo()
+{
+    const char* asmName = nullptr;
+    getOptions()->getOption(VISA_AsmFileName, asmName);
+    char dumpFileName[MAX_OPTION_STR_LENGTH];
+    SNPRINTF(dumpFileName, MAX_OPTION_STR_LENGTH, "%s.regInfo",
+        asmName);
+    fstream ofile(dumpFileName, ios::out);
+
+    emit_RegInfoKernel(ofile);
+
+    ofile.close();
+}
+
+void G4_Kernel::emit_RegInfoKernel(std::ostream& output)
+{
+    output << "//.platform " << platformString[fg.builder->getPlatform()];
+    output << "\n" << "//.stepping " << GetSteppingString();
+    output << "\n" << "//.CISA version " << (unsigned int)major_version
+        << "." << (unsigned int)minor_version;
+    output << "\n" << "//.kernel ID 0x" << hex << getKernelID() << "\n";
+    output << dec << "\n";
+    int instOffset = 0;
+
+    for (BB_LIST_ITER itBB = fg.begin(); itBB != fg.end(); ++itBB)
+    {
+        for (INST_LIST_ITER itInst = (*itBB)->begin(); itInst != (*itBB)->end(); ++itInst)
+        {
+            G4_INST* inst = (*itInst);
+            if (inst->isLabel())
+            {
+                continue;
+            }
+            if (inst->getLexicalId() == -1)
+            {
+                continue;
+            }
+
+            (*itBB)->emitRegInfo(output, inst, instOffset);
+            instOffset += inst->isCompactedInst() ? 8 : 16;
+        }
+    }
+    return;
+}
 
 void G4_Kernel::emit_dep(std::ostream& output)
 {
@@ -5891,6 +5935,49 @@ void G4_Kernel::emit_dep(std::ostream& output)
     return;
 }
 
+void G4_BB::emitRegInfo(std::ostream& output, G4_INST* inst, int offset)
+{
+    output << "#" << inst->getLexicalId() << "|" << offset << ":";
+    G4_DstRegRegion* dstOpnd = inst->getDst();
+
+    if (dstOpnd &&
+        !dstOpnd->isIndirect() &&
+        dstOpnd->isGreg())
+    {
+        uint32_t byteAddress = dstOpnd->getLinearizedStart();
+        unsigned dstReg0 = byteAddress / GENX_GRF_REG_SIZ;
+        output << " {";
+        output << "D:" << dstReg0;
+        output << "}";
+    }
+
+    for (int i = 0; i < inst->getNumSrc(); i++)
+    {
+        G4_Operand* srcOpnd = inst->getSrc(i);
+        if (srcOpnd)
+        {
+            if (srcOpnd->isSrcRegRegion() &&
+                srcOpnd->asSrcRegRegion()->getBase() &&
+                !srcOpnd->asSrcRegRegion()->isIndirect() &&
+                srcOpnd->asSrcRegRegion()->getBase()->isRegVar())
+            {
+                G4_RegVar* baseVar = static_cast<G4_RegVar*>(srcOpnd->asSrcRegRegion()->getBase());
+                if (baseVar->isGreg()) {
+                    uint32_t byteAddress = srcOpnd->getLinearizedStart();
+                    unsigned srcReg = byteAddress / GENX_GRF_REG_SIZ;
+                    output << " {";
+                    output << "S" << i;
+                    output << ":" << srcReg;
+                    output << "}";
+                }
+            }
+        }
+    }
+
+    output << std::endl;
+    return;
+}
+
 void G4_BB::emitDepInfo(std::ostream& output, G4_INST* inst, int offset)
 {
     int tabnum = 0;

visa/VISAKernelImpl.cpp

@@ -372,6 +372,12 @@ void* VISAKernelImpl::compilePostOptimize(unsigned int& binarySize)
 
     m_kernel->evalAddrExp();
 
+    if (getOptions()->getOption(vISA_DumpRegInfo))
+    {
+        m_kernel->dump();
+        m_kernel->emit_RegInfo();
+    }
+
     if (getOptions()->getOption(vISA_setStartBreakPoint))
     {
         auto getFirstNonLabelInst = [this]()

visa/include/VISAOptions.def

@@ -204,6 +204,7 @@ DEF_VISA_OPTION(VISA_AsmFileName,       ET_CSTR, "-asmNameUser",           "USAG
 DEF_VISA_OPTION(vISA_DecodeDbg,         ET_CSTR, "-decodedbg",             "USAGE: -decodedbg <dbg filename>\n",    NULL)
 DEF_VISA_OPTION(vISA_encoderFile,       ET_CSTR, "-encoderStatisticsFile", "USAGE: -encoderStatisticsFile <reloc file>\n", "encoderStatistics.csv")
 DEF_VISA_OPTION(vISA_CISAbinary,        ET_CSTR, "-CISAbinary",            "USAGE: File Name with isaasm paths. ",  NULL)
+DEF_VISA_OPTION(vISA_DumpRegInfo, ET_BOOL, "-dumpRegInfo",            UNUSED, false)
 
 //=== misc options ===
 DEF_VISA_OPTION(vISA_PlatformIsSet,       ET_BOOL,  NULLSTR,              UNUSED, false)