Reverting Coverity fixes

MichalMroz12 · pszymich · commit 3e9dec82ab67 · 2024-02-14T10:32:22.000+01:00
Reverting the changes of Coverity fixes due to performance regression (cherry picked from commit 1941204)
diff --git a/IGC/AdaptorOCL/SPIRV/SPIRVUtil.cpp b/IGC/AdaptorOCL/SPIRV/SPIRVUtil.cpp
@@ -279,7 +279,7 @@ getSPIRVBuiltinName(Op OC, SPIRVInstruction *BI, const std::vector<Type*>& ArgTy
 
   if (!name.empty()) {
     name = name + suffix;
-    decorateSPIRVBuiltin(name, std::move(ArgTypes));
+    decorateSPIRVBuiltin(name, ArgTypes);
   }
   else
   {
diff --git a/IGC/Compiler/CISACodeGen/ShaderCodeGen.cpp b/IGC/Compiler/CISACodeGen/ShaderCodeGen.cpp
@@ -426,7 +426,7 @@ void AddLegalizationPasses(CodeGenContext& ctx, IGCPassManager& mpm, PSSignature
             GenIntrinsicsTTIImpl GTTI(&ctx);
             return TargetTransformInfo(GTTI);
             });
-        mpm.add(new TargetTransformInfoWrapperPass(std::move(GenTTgetIIRAnalysis)));
+        mpm.add(new TargetTransformInfoWrapperPass(GenTTgetIIRAnalysis));
     }
 
     // Disable all target library functions.
diff --git a/IGC/Compiler/MetaDataApi/IGCMetaDataHelper.cpp b/IGC/Compiler/MetaDataApi/IGCMetaDataHelper.cpp
@@ -38,7 +38,7 @@ void IGCMetaDataHelper::moveFunction(
     {
         auto funcInfo = loc->second;
         FuncMD.erase(OldFunc);
-        FuncMD[NewFunc] = std::move(funcInfo);
+        FuncMD[NewFunc] = funcInfo;
     }
 }
 
diff --git a/IGC/Compiler/Optimizer/OpenCLPasses/GenericAddressResolution/LowerGPCallArg.cpp b/IGC/Compiler/Optimizer/OpenCLPasses/GenericAddressResolution/LowerGPCallArg.cpp
@@ -146,7 +146,7 @@ void LowerGPCallArg::updateMetadata(Function* oldFunc, Function* newFunc) {
     {
         auto funcInfo = loc->second;
         FuncMD.erase(oldFunc);
-        FuncMD[newFunc] = std::move(funcInfo);
+        FuncMD[newFunc] = funcInfo;
     }
 
     m_mdUtils->save(m_module->getContext());
diff --git a/IGC/Compiler/Optimizer/PreCompiledFuncImport.cpp b/IGC/Compiler/Optimizer/PreCompiledFuncImport.cpp
@@ -2696,14 +2696,12 @@ void PreCompiledFuncImport::checkAndSetEnableSubroutine()
             switch (I->getOpcode()) {
             default:
                 break;
-            case Instruction::FDiv: {
+            case Instruction::FDiv:
                 if (DPDivSqrtEmu && I->getOperand(0)->getType()->isDoubleTy())
                 {
                     m_enableCallForEmulation = true;
                     m_pCtx->m_hasDPDivSqrtEmu = true;
                 }
-                break;
-            }
             case Instruction::FMul:
             case Instruction::FAdd:
             case Instruction::FSub:
diff --git a/IGC/Compiler/compiler_caps.cpp b/IGC/Compiler/compiler_caps.cpp
@@ -117,7 +117,7 @@ namespace IGC
 
     }
 
-    static void DumpCaps(const GT_SYSTEM_INFO &sysinfo, PLATFORM platformInfo, Debug::Dump const& dump)
+    static void DumpCaps(const GT_SYSTEM_INFO sysinfo, PLATFORM platformInfo, Debug::Dump const& dump)
     {
         std::string outputString;
         CreateCompilerCapsString(&sysinfo, platformInfo, outputString);
diff --git a/IGC/OCLFE/igd_fcl_mcl/headers/common_clang.h b/IGC/OCLFE/igd_fcl_mcl/headers/common_clang.h
@@ -36,8 +36,6 @@ namespace Intel { namespace OpenCL { namespace ClangFE {
     //
     struct IOCLFEBinaryResult
     {
-        IOCLFEBinaryResult(const IOCLFEBinaryResult& cm) = delete;
-        IOCLFEBinaryResult& operator=(const IOCLFEBinaryResult& cm) = delete;
         // Returns the size in bytes of the IR buffer
         virtual size_t      GetIRSize() const = 0;
         // Returns the pointer to the IR buffer or NULL if no IR buffer is present
diff --git a/visa/ByteCodeReaderNG.cpp b/visa/ByteCodeReaderNG.cpp
@@ -775,7 +775,9 @@ static void readInstructionDataportNG(unsigned &bytePos, const char *buf,
   switch (opcode) {
   case ISA_MEDIA_ST:
   case ISA_MEDIA_LD: {
-uint8_t modifier = readPrimitiveOperandNG<uint8_t>(bytePos, buf);
+    uint8_t modifier = (ISA_MEDIA_LD == opcode || ISA_MEDIA_ST == opcode)
+                           ? readPrimitiveOperandNG<uint8_t>(bytePos, buf)
+                           : 0;
     uint8_t surface = readPrimitiveOperandNG<uint8_t>(bytePos, buf);
     uint8_t plane = (ISA_MEDIA_LD == opcode || ISA_MEDIA_ST == opcode)
                         ? readPrimitiveOperandNG<uint8_t>(bytePos, buf)
diff --git a/visa/FlowGraph.cpp b/visa/FlowGraph.cpp
@@ -382,16 +382,14 @@ int64_t FlowGraph::insertDummyUUIDMov() {
           builder->createMov(g4::SIMD1, nullDst, randImm, InstOpt_NoOpt, false);
 
       auto instItEnd = bb->end();
-      auto it = bb->begin();
-
-      if (it != instItEnd) {
-          if ((*it)->isLabel()) {
-              bb->insertBefore(++it, movInst);
-              return uuID;
-          }
-
-          bb->push_front(movInst);
+      for (auto it = bb->begin(); it != instItEnd; it++) {
+        if ((*it)->isLabel()) {
+          bb->insertBefore(++it, movInst);
           return uuID;
+        }
+
+        bb->push_front(movInst);
+        return uuID;
       }
     }
   }
diff --git a/visa/G4_IR.cpp b/visa/G4_IR.cpp
@@ -2772,6 +2772,7 @@ bool G4_INST::isRAWdep(G4_INST *inst) {
   G4_Operand *dst0 = inst->getDst();
   G4_CondMod *cMod0 = inst->getCondMod();
   G4_Operand *implicitDst0 = inst->getImplAccDst();
+  G4_Operand *msg1 = NULL;
   G4_Predicate *pred1 = getPredicate();
   G4_Operand *src1_0 = getSrc(0);
   G4_Operand *src1_1 = getSrc(1);
@@ -2789,6 +2790,7 @@ bool G4_INST::isRAWdep(G4_INST *inst) {
          src1_2->compareOperand(dst0, getBuilder()) != Rel_disjoint) ||
         (src1_3 &&
          src1_3->compareOperand(dst0, getBuilder()) != Rel_disjoint) ||
+        (msg1 && msg1->compareOperand(dst0, getBuilder()) != Rel_disjoint) ||
         (pred1 && pred1->compareOperand(dst0, getBuilder()) != Rel_disjoint) ||
         (implicitSrc1 &&
          implicitSrc1->compareOperand(dst0, getBuilder()) != Rel_disjoint)) {
@@ -3893,7 +3895,7 @@ uint8_t G4_SrcRegRegion::getMaxExecSize(const IR_Builder &builder, int pos,
   // conservative.
   // Here we assume that no cross width if row size is larger than width
   // mul (16) V112(0,0)<1>:f V111(0,0)<16;16,1>:f r1.0<1;4,0>:f
-  if (!alignToRow && desc->vertStride != 0 &&
+  if (!alignToRow && !contRegion && desc->vertStride != 0 &&
       desc->horzStride != 0) {
     wd = vs =
         (uint16_t)roundDownPow2((pos / desc->width + 1) * desc->width - pos);
@@ -3926,7 +3928,7 @@ uint8_t G4_SrcRegRegion::getMaxExecSize(const IR_Builder &builder, int pos,
           eleInFirstRow = desc->width - posInFirstRow;
   uint8_t pow2 = roundDownPow2(eleInFirstRow);
 
-  if (eleInFirstRow != pow2) {
+  if (eleInFirstRow != pow2 && !contRegion) {
     wd = pow2;
     vs = wd * desc->horzStride;
     return pow2;
@@ -3950,7 +3952,7 @@ uint8_t G4_SrcRegRegion::getMaxExecSize(const IR_Builder &builder, int pos,
         elSize;
 
     // check cross row boundary
-    if (posInRow == 0) {
+    if ((!contRegion || desc->vertStride == 0) && posInRow == 0) {
       uint8_t pow2Val = roundDownPow2(eleInRow);
       if (pow2Val != eleInRow ||
           ((desc->vertStride == 0 || negVS) && !alignToRow)) {
@@ -3984,7 +3986,7 @@ uint8_t G4_SrcRegRegion::getMaxExecSize(const IR_Builder &builder, int pos,
         // subregister offset of two GRFs are different and not contiguous(too
         // conservative?)
         if (pow2Val != maxSize ||
-            (!(alignToRow && maxSize <= desc->width) &&
+            (!contRegion && !(alignToRow && maxSize <= desc->width) &&
              newLB % builder.numEltPerGRF<Type_UB>() !=
                  (getLeftBound() + currPos) %
                      builder.numEltPerGRF<Type_UB>())) {
@@ -4006,7 +4008,7 @@ uint8_t G4_SrcRegRegion::getMaxExecSize(const IR_Builder &builder, int pos,
     maxSize++;
     eleInRow++;
     // make sure the number of elements in two rows are the same
-    if (crossRow && eleInRow == eleInFirstRow && !alignToRow) {
+    if (crossRow && eleInRow == eleInFirstRow && !alignToRow && !contRegion) {
       break;
     }
 
@@ -5308,7 +5310,7 @@ unsigned G4_Predicate::computeRightBound(uint8_t exec_size) {
 
     right_bound = left_bound + totalBits - 1;
 
-    bitVec[0] = exec_size >= 32 ? 0xFFFFFFFF : (1 << exec_size) - 1;
+    bitVec[0] = exec_size == 32 ? 0xFFFFFFFF : (1 << exec_size) - 1;
   }
 
   return right_bound;
diff --git a/visa/GraphColor.cpp b/visa/GraphColor.cpp
@@ -5550,7 +5550,7 @@ void Augmentation::buildSummaryForCallees() {
         }
       }
     }
-    localSummaryOfCallee[func] = std::move(funcSummary);
+    localSummaryOfCallee[func] = funcSummary;
   }
 }
 
@@ -5634,7 +5634,7 @@ void Augmentation::augmentIntfGraph() {
         dclIntervals.push_back(std::make_tuple(dcl, interval.interval.start,
                                                interval.interval.end));
       }
-      updateDebugInfo(kernel, std::move(dclIntervals));
+      updateDebugInfo(kernel, dclIntervals);
     }
 
     // Perform linear scan to augment graph
@@ -9696,7 +9696,9 @@ void VarSplit::localSplit(IR_Builder &builder, G4_BB *bb) {
         if (topdcl && (topdclLR = gra.getLocalLR(topdcl)) &&
             topdcl->getIsRefInSendDcl() && topdclLR->isLiveRangeLocal() &&
             topdcl->getRegFile() == G4_GRF) {
-          G4_VarBase *base = src->asSrcRegRegion()->getBase();
+          G4_VarBase *base =
+              (topdcl != NULL ? topdcl->getRegVar()
+                              : src->asSrcRegRegion()->getBase());
 
           INST_LIST_ITER iterToInsert = rit.base();
           iterToInsert--;
diff --git a/visa/Passes/AccSubstitution.cpp b/visa/Passes/AccSubstitution.cpp
@@ -912,7 +912,6 @@ struct AccAssignment {
   // on inst type/size) we have to spill active intervals that occupy acc0/acc1.
   // the pre-assigned interavl is also pushed to active list
   void handlePreAssignedInterval(AccInterval *interval) {
-    vISA_ASSERT(interval->assignedAcc >= 0, "interval->assignedAcc can't be negative");
     if (!freeAccs[interval->assignedAcc]) {
       spillInterval(interval->assignedAcc);
     }
diff --git a/visa/ReduceExecSize.cpp b/visa/ReduceExecSize.cpp
@@ -12,8 +12,6 @@ SPDX-License-Identifier: MIT
 #include "InstSplit.h"
 #include "Optimizer.h"
 
-#include <algorithm>
-
 using namespace vISA;
 
 uint8_t HWConformity::checkMinExecSize(G4_opcode op) {
@@ -101,8 +99,8 @@ bool HWConformity::fixDstAlignmentWithVectorImm(INST_LIST_ITER iter,
         // we can interleave the vector to avoid a move
         // e.g., mov (2) r1.0<1>:d 0x21:uv  -->
         //       mov (2) r1.0<1>:d 0x0201:uv
-          uint64_t bitValue = 0;
-          uint32_t immBits = static_cast<uint32_t>(src->asImm()->getImm());
+        uint32_t bitValue = 0;
+        uint16_t immBits = (uint16_t)src->asImm()->getImm();
         for (int i = 0; i < execSize; ++i) {
           int val = (immBits >> (i * 4)) & 0xF;
           bitValue |= val << (i * 8);
diff --git a/visa/RegAlloc.cpp b/visa/RegAlloc.cpp
@@ -670,7 +670,7 @@ void LivenessAnalysis::computeLiveness() {
   //
   // initialize entry block with payload input
   //
-  def_in[fg.getEntryBB()->getId()] = std::move(inputDefs);
+  def_in[fg.getEntryBB()->getId()] = inputDefs;
 
   //
   // forward flow analysis to propagate defs (locate first defs)
diff --git a/visa/iga/IGALibrary/Frontend/Formatter.hpp b/visa/iga/IGALibrary/Frontend/Formatter.hpp
@@ -208,10 +208,10 @@ class BasicFormatter {
   // enables you emit a list of things
   //
   // emit(foo, bar, baz, ...);
-  template <typename T, typename... Ts> void emit(const T& t) { emitT(t); }
-  template <typename T, typename... Ts> void emit(const T& t, const Ts&... ts) {
-    emitT(t);
-    emit(ts...);
+  template <typename T, typename... Ts> void emit(T t) { emitT(t); }
+  template <typename T, typename... Ts> void emit(T t, Ts... ts) {
+    emitT(std::move(t));
+    emit(std::move(ts)...);
   }
 
   // emits an sequence conditionally surrounded by an ANSI color

Original file line number	Diff line number	Diff line change
`@@ -279,7 +279,7 @@ getSPIRVBuiltinName(Op OC, SPIRVInstruction BI, const std::vector<Type>& ArgTy`
`279`	`279`
`280`	`280`	`if (!name.empty()) {`
`281`	`281`	`name = name + suffix;`
`282`		`- decorateSPIRVBuiltin(name, std::move(ArgTypes));`
	`282`	`+ decorateSPIRVBuiltin(name, ArgTypes);`
`283`	`283`	`}`
`284`	`284`	`else`
`285`	`285`	`{`
Original file line number	Diff line number	Diff line change
`@@ -426,7 +426,7 @@ void AddLegalizationPasses(CodeGenContext& ctx, IGCPassManager& mpm, PSSignature`
`426`	`426`	`GenIntrinsicsTTIImpl GTTI(&ctx);`
`427`	`427`	`return TargetTransformInfo(GTTI);`
`428`	`428`	`});`
`429`		`- mpm.add(new TargetTransformInfoWrapperPass(std::move(GenTTgetIIRAnalysis)));`
	`429`	`+ mpm.add(new TargetTransformInfoWrapperPass(GenTTgetIIRAnalysis));`
`430`	`430`	`}`
`431`	`431`
`432`	`432`	`// Disable all target library functions.`
Original file line number	Diff line number	Diff line change
`@@ -38,7 +38,7 @@ void IGCMetaDataHelper::moveFunction(`
`38`	`38`	`{`
`39`	`39`	`auto funcInfo = loc->second;`
`40`	`40`	`FuncMD.erase(OldFunc);`
`41`		`- FuncMD[NewFunc] = std::move(funcInfo);`
	`41`	`+ FuncMD[NewFunc] = funcInfo;`
`42`	`42`	`}`
`43`	`43`	`}`
`44`	`44`
Original file line number	Diff line number	Diff line change
`@@ -146,7 +146,7 @@ void LowerGPCallArg::updateMetadata(Function* oldFunc, Function* newFunc) {`
`146`	`146`	`{`
`147`	`147`	`auto funcInfo = loc->second;`
`148`	`148`	`FuncMD.erase(oldFunc);`
`149`		`- FuncMD[newFunc] = std::move(funcInfo);`
	`149`	`+ FuncMD[newFunc] = funcInfo;`
`150`	`150`	`}`
`151`	`151`
`152`	`152`	`m_mdUtils->save(m_module->getContext());`
Original file line number	Diff line number	Diff line change
`@@ -117,7 +117,7 @@ namespace IGC`
`117`	`117`
`118`	`118`	`}`
`119`	`119`
`120`		`- static void DumpCaps(const GT_SYSTEM_INFO &sysinfo, PLATFORM platformInfo, Debug::Dump const& dump)`
	`120`	`+ static void DumpCaps(const GT_SYSTEM_INFO sysinfo, PLATFORM platformInfo, Debug::Dump const& dump)`
`121`	`121`	`{`
`122`	`122`	`std::string outputString;`
`123`	`123`	`CreateCompilerCapsString(&sysinfo, platformInfo, outputString);`
Original file line number	Diff line number	Diff line change
`@@ -36,8 +36,6 @@ namespace Intel { namespace OpenCL { namespace ClangFE {`
`36`	`36`	`//`
`37`	`37`	`struct IOCLFEBinaryResult`
`38`	`38`	`{`
`39`		`- IOCLFEBinaryResult(const IOCLFEBinaryResult& cm) = delete;`
`40`		`- IOCLFEBinaryResult& operator=(const IOCLFEBinaryResult& cm) = delete;`
`41`	`39`	`// Returns the size in bytes of the IR buffer`
`42`	`40`	`virtual size_t GetIRSize() const = 0;`
`43`	`41`	`// Returns the pointer to the IR buffer or NULL if no IR buffer is present`