Avoid calling ambiguous intrinsics from emulation builtins

If GenISA intrinsics are declared in OpenCL C as follows:
```c
extern double GenISA_fma_rtz(double, double, double);
```
Clang produces the following LLVM function declaration:
```llvm
declare dso_local double @GenISA_fma_rtz(double, double, double)
```

The issue is that the declaration is not mangled, so the same function
name will be produced for double and float types. If a kernel needs multiple
emulation builtins to be imported and some of them need `float` version of
`GenISA_fma_rtz` and some of them need `double` version of `GenISA_fma_rtz`,
then LLVM treats them both as the same function, hence it inserts a `bitcast`
instruction for one of them (depending on which one was imported first):
```llvm
float bitcast (double (double, double, double)* @GenISA_fma_rtz to float (float, float, float)*)(float %div, float 0xBE98000000000000, float %div)
```

It is incorrect, because we call `double` version of the intrinsic, even
though the intention was to call the `float` version.

The solution for this issue is to add manual mangling to GenISA externs:
```c
extern double GenISA_fma_rtz_f64(double, double, double);
```

(cherry picked from commit aecdc4c)

Author: aratajew

IGC/Compiler/Builtins/LibraryDPEmu.hpp

@@ -1,6 +1,6 @@
 /*========================== begin_copyright_notice ============================
 
-Copyright (C) 2017-2022 Intel Corporation
+Copyright (C) 2017-2023 Intel Corporation
 
 SPDX-License-Identifier: MIT
 
@@ -635,14 +635,10 @@ bool PreCompiledFuncImport::runOnModule(Module& M)
     // When we test it, we need to set emuKind
     if (IGC_GET_FLAG_VALUE(TestIGCPreCompiledFunctions) == 1)
     {
-        m_emuKind = EmuKind::EMU_DP;
-        checkAndSetEnableSubroutine();
-    }
-    else if (IGC_GET_FLAG_VALUE(TestIGCPreCompiledFunctions) == 2)
-    {
-        m_emuKind = EmuKind::EMU_DP_DIV_SQRT;
+        m_emuKind = IGC_GET_FLAG_VALUE(ForceEmuKind) ? IGC_GET_FLAG_VALUE(ForceEmuKind) : EmuKind::EMU_DP;
         checkAndSetEnableSubroutine();
     }
+
     // sanity check
     if (m_emuKind == 0) {
         // Nothing to emulate
@@ -756,15 +752,15 @@ bool PreCompiledFuncImport::runOnModule(Module& M)
                 for (auto& I : BB) {
                     if (CallInst* CI = dyn_cast<CallInst>(&I)) {
                         if (Function* calledFunc = CI->getCalledFunction()) {
-                            if (calledFunc->getName().equals("GenISA_fma_rtz"))
+                            if (calledFunc->getName().startswith("GenISA_fma_rtz"))
                             {
                                 createIntrinsicCall(CI, GenISAIntrinsic::GenISA_fma_rtz);
                             }
-                            else if (calledFunc->getName().equals("GenISA_fma_rtp"))
+                            else if (calledFunc->getName().startswith("GenISA_fma_rtp"))
                             {
                                 createIntrinsicCall(CI, GenISAIntrinsic::GenISA_fma_rtp);
                             }
-                            else if (calledFunc->getName().equals("GenISA_fma_rtn"))
+                            else if (calledFunc->getName().startswith("GenISA_fma_rtn"))
                             {
                                 createIntrinsicCall(CI, GenISAIntrinsic::GenISA_fma_rtn);
                             }
@@ -794,15 +790,15 @@ bool PreCompiledFuncImport::runOnModule(Module& M)
                         {
                             if (Function* calledFunc = CI->getCalledFunction())
                             {
-                                if (calledFunc->getName().equals("GenISA_mul_rtz"))
+                                if (calledFunc->getName().startswith("GenISA_mul_rtz"))
                                 {
                                     createIntrinsicCall(CI, GenISAIntrinsic::GenISA_mul_rtz);
                                 }
-                                else if (calledFunc->getName().equals("GenISA_add_rtz"))
+                                else if (calledFunc->getName().startswith("GenISA_add_rtz"))
                                 {
                                     createIntrinsicCall(CI, GenISAIntrinsic::GenISA_add_rtz);
                                 }
-                                else if (calledFunc->getName().equals("GenISA_uitof_rtz"))
+                                else if (calledFunc->getName().startswith("GenISA_uitof_rtz"))
                                 {
                                     createIntrinsicCall(CI, GenISAIntrinsic::GenISA_uitof_rtz);
                                 }

IGC/Compiler/Builtins/LibraryIntS32DivRemEmu.hpp

@@ -0,0 +1,40 @@
+;=========================== begin_copyright_notice ============================
+;
+; Copyright (C) 2023 Intel Corporation
+;
+; SPDX-License-Identifier: MIT
+;
+;============================ end_copyright_notice =============================
+;
+; REQUIRES: regkeys
+;
+; RUN: igc_opt -regkey TestIGCPreCompiledFunctions=1 -regkey ForceEmuKind=109 %s -S -o - --platformmtl --igc-precompiled-import | FileCheck %s
+; ------------------------------------------------
+; PreCompiledFuncImport
+;
+; ForceEmuKind=109 means EMU_I64DIVREM | EMU_DP_DIV_SQRT | EMU_SP_DIV | EMU_I32DIVREM_SP | EMU_FP64_FP16_CONV
+;
+; This test verifies if GenISA.fma intrinsic names clash doesn't occur when `sdiv i64` and `fdiv double`
+; are simultaniously emulated in the same LLVM module. Sdiv's implementation uses fma.rtz.f32, while
+; fdiv's implementation uses fma.rtz.f64. If IGC emulation builtins didn't add type mangling to GenISA_fma_rtz,
+; we would end up with incorrect bitcast instruction that would result in using float fma.rtz in places where
+; double version is expected.
+;
+; ------------------------------------------------
+
+; CHECK-NOT: call float bitcast (double (double, double, double)* @GenISA_fma_rtz to float (float, float, float)*)(float {{.*}}, float {{.*}}, float {{.*}})
+
+; CHECK-LABEL: @__igcbuiltin_dp_div_nomadm_ieee
+; CHECK: call double @llvm.genx.GenISA.fma.rtz.f64.f64.f64.f64(double {{.*}}, double {{.*}}, double {{.*}})
+
+; CHECK-LABEL: @__igcbuiltin_s64_sdiv_sp
+; CHECK: call float @llvm.genx.GenISA.fma.rtz.f32.f32.f32.f32(float {{.*}}, float {{.*}}, float {{.*}})
+
+define void @kernel(i64 addrspace(1)* %outA, double addrspace(1)* %outB, i64 %ix, i64 %iy, double %dx, double %dy) {
+entry:
+  %iresult = sdiv i64 %ix, %iy
+  store i64 %iresult, i64 addrspace(1)* %outA, align 8
+  %dresult = fdiv double %dx, %dy
+  store double %dresult, double addrspace(1)* %outB, align 8
+  ret void
+}

IGC/Compiler/Builtins/LibraryIntS32DivRemEmuSP.hpp

@@ -7,7 +7,7 @@
 ;============================ end_copyright_notice =============================
 ; REQUIRES: regkeys
 ;
-; RUN: igc_opt -regkey TestIGCPreCompiledFunctions=2 -regkey InlinedEmulationThreshold=500 --platformmtl --igc-precompiled-import -S < %s | FileCheck %s
+; RUN: igc_opt -regkey TestIGCPreCompiledFunctions=1 -regkey ForceEmuKind=4 -regkey InlinedEmulationThreshold=500 --platformmtl --igc-precompiled-import -S < %s | FileCheck %s
 ; ------------------------------------------------
 ; PreCompiledFuncImport
 ; ------------------------------------------------

IGC/Compiler/Builtins/LibraryIntU32DivRemEmu.hpp

@@ -7,7 +7,7 @@
 ;============================ end_copyright_notice =============================
 ; REQUIRES: regkeys
 ;
-; RUN: igc_opt -regkey TestIGCPreCompiledFunctions=2 -regkey InlinedEmulationThreshold=600 --platformmtl --igc-precompiled-import -S < %s | FileCheck %s
+; RUN: igc_opt -regkey TestIGCPreCompiledFunctions=1 -regkey ForceEmuKind=4 -regkey InlinedEmulationThreshold=600 --platformmtl --igc-precompiled-import -S < %s | FileCheck %s
 ; ------------------------------------------------
 ; PreCompiledFuncImport
 ; ------------------------------------------------

IGC/Compiler/Builtins/LibraryIntU32DivRemEmuSP.hpp

@@ -302,7 +302,8 @@ DECLARE_IGC_REGKEY(bool, SToSProducesPositivePointer,   false, "This key is for
 DECLARE_IGC_REGKEY(bool, EnableSupportBufferOffset,     false, "[debugging]For StatelessToStateful optimization [OCL], support implicit buffer offset argument (same as -cl-intel-has-buffer-offset-arg).", false)
 DECLARE_IGC_REGKEY(bool, EnableOptionalBufferOffset,    true,  "For StatelessToStateful optimization [OCL], if true, make buffer offset optional. Valid only if buffer offset is supported.", true)
 DECLARE_IGC_REGKEY(bool, EnableTestIGCBuiltin,          false, "Enable testing igc builtin (precompiled kernels) using OCL.", false)
-DECLARE_IGC_REGKEY(DWORD, TestIGCPreCompiledFunctions,  0,     "Enable testing for precompiled kernels. [TEST ONLY]", false)
+DECLARE_IGC_REGKEY(bool, TestIGCPreCompiledFunctions,   false, "Enable testing for precompiled kernels. [TEST ONLY]", false)
+DECLARE_IGC_REGKEY(DWORD, ForceEmuKind,                 0,     "Force emuKind used by PreCompiledFuncImport pass. This flag takes emulation kind value that is defined in EmuKind enum in PreCompiledFuncImport.hpp [TEST ONLY]", false)
 DECLARE_IGC_REGKEY(bool, EnableCSSIMD32,                false, "Enable computer shader SIMD32 mode, and fall back to lower SIMD when spill", false)
 DECLARE_IGC_REGKEY(bool, ForceCSSIMD32,                 false, "Force computer shader SIMD32 mode", false)
 DECLARE_IGC_REGKEY(bool, ForceCSSIMD16,                 false, "Force computer shader SIMD16 mode if allowed, otherwise it will use SIMD32", false)