Error in CodeGen_LLVM with predicated load/store of 1-lane vectors

[stevenraphael]

When CodeGen_LLVM tries to codegen a predicated load or store involving a 1-lane vector (which happens any time the vector length in the IR is 1 modulo the native vector length), it raises an error because slice_vector turns 1-lane vectors into single elements via CreateExtractElement. This is incompatible with CreateMaskedStore and CreateMaskedLoad, which require a vector type. The simplest way to fix this is to just not convert these 1-lane vectors into elements.

Code to reproduce:

f1(x) = input(x) * 2;
f2(x) = select(x < 8, 0, f1(x)+f1(x+1));

f2.split(x, xo, xi, 8);
f1.compute_at(f2, xo).vectorize(x);

[abadams]

Proposed fix: Just before we call CreateMaskedLoad or CreateMaskedStore, if any arg is a scalar, bitcast it to a single-element vector instead.

[alexreinking]

Proposed fix: Just before we call CreateMaskedLoad or CreateMaskedStore, if any arg is a scalar, bitcast it to a single-element vector instead.

Why is it invalid to just remove these lines?

Halide/src/CodeGen_LLVM.cpp

Lines 4882 to 4884 in 6f6eba1

	if (size == 1) {
	return builder->CreateExtractElement(vec, (uint64_t)start);
	}

TBQH it feels like a more principled fix to strengthen the type of slice_vector (always returns a vector) than to weaken the type requirements of CreateMaskedStore/Load by lazily coercing types. There are only two places we call those functions, once each, and always with the return value of slice_vector.

[alexreinking]

Ah, I guess there are quite a few places that expect one-element vectors to be unpacked as scalars. That's too big a change.