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all: add floating point option for ARM targets
This change introduces new options to set the floating point mode on ARM targets. The GOARM version number can optionally be followed by ',hardfloat' or ',softfloat' to select whether to use hardware instructions or software emulation for floating point computations, respectively. For example, GOARM=7,softfloat. Previously, software floating point support was limited to GOARM=5. With these options, software floating point is now extended to all ARM versions, including GOARM=6 and 7. This change also extends hardware floating point to GOARM=5. GOARM=5 defaults to softfloat and GOARM=6 and 7 default to hardfloat. For golang#61588 Change-Id: I23dc86fbd0733b262004a2ed001e1032cf371e94 Reviewed-on: https://go-review.googlesource.com/c/go/+/514907 Run-TryBot: Michael Knyszek <mknyszek@google.com> Reviewed-by: Michael Knyszek <mknyszek@google.com> Reviewed-by: Keith Randall <khr@golang.org> TryBot-Result: Gopher Robot <gobot@golang.org> Reviewed-by: Keith Randall <khr@google.com> Auto-Submit: Michael Knyszek <mknyszek@google.com>
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‎src/cmd/asm/internal/asm/endtoend_test.go‎

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -372,10 +372,10 @@ func Test386EndToEnd(t *testing.T) {
372372
}
373373

374374
func TestARMEndToEnd(t *testing.T) {
375-
defer func(old int) { buildcfg.GOARM = old }(buildcfg.GOARM)
375+
defer func(old int) { buildcfg.GOARM.Version = old }(buildcfg.GOARM.Version)
376376
for _, goarm := range []int{5, 6, 7} {
377377
t.Logf("GOARM=%d", goarm)
378-
buildcfg.GOARM = goarm
378+
buildcfg.GOARM.Version = goarm
379379
testEndToEnd(t, "arm", "arm")
380380
if goarm == 6 {
381381
testEndToEnd(t, "arm", "armv6")

‎src/cmd/compile/internal/arm/galign.go‎

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -15,7 +15,7 @@ func Init(arch *ssagen.ArchInfo) {
1515
arch.LinkArch = &arm.Linkarm
1616
arch.REGSP = arm.REGSP
1717
arch.MAXWIDTH = (1 << 32) - 1
18-
arch.SoftFloat = buildcfg.GOARM == 5
18+
arch.SoftFloat = buildcfg.GOARM.SoftFloat
1919
arch.ZeroRange = zerorange
2020
arch.Ginsnop = ginsnop
2121

‎src/cmd/compile/internal/arm/ssa.go‎

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -289,7 +289,7 @@ func ssaGenValue(s *ssagen.State, v *ssa.Value) {
289289
case ssa.OpARMANDconst, ssa.OpARMBICconst:
290290
// try to optimize ANDconst and BICconst to BFC, which saves bytes and ticks
291291
// BFC is only available on ARMv7, and its result and source are in the same register
292-
if buildcfg.GOARM == 7 && v.Reg() == v.Args[0].Reg() {
292+
if buildcfg.GOARM.Version == 7 && v.Reg() == v.Args[0].Reg() {
293293
var val uint32
294294
if v.Op == ssa.OpARMANDconst {
295295
val = ^uint32(v.AuxInt)
@@ -646,7 +646,7 @@ func ssaGenValue(s *ssagen.State, v *ssa.Value) {
646646
default:
647647
}
648648
}
649-
if buildcfg.GOARM >= 6 {
649+
if buildcfg.GOARM.Version >= 6 {
650650
// generate more efficient "MOVB/MOVBU/MOVH/MOVHU Reg@>0, Reg" on ARMv6 & ARMv7
651651
genshift(s, v, v.Op.Asm(), 0, v.Args[0].Reg(), v.Reg(), arm.SHIFT_RR, 0)
652652
return

‎src/cmd/compile/internal/ssa/_gen/ARM.rules‎

Lines changed: 29 additions & 29 deletions
Original file line numberDiff line numberDiff line change
@@ -66,17 +66,17 @@
6666

6767
// count trailing zero for ARMv5 and ARMv6
6868
// 32 - CLZ(x&-x - 1)
69-
(Ctz32 <t> x) && buildcfg.GOARM<=6 =>
69+
(Ctz32 <t> x) && buildcfg.GOARM.Version<=6 =>
7070
(RSBconst [32] (CLZ <t> (SUBconst <t> (AND <t> x (RSBconst <t> [0] x)) [1])))
71-
(Ctz16 <t> x) && buildcfg.GOARM<=6 =>
71+
(Ctz16 <t> x) && buildcfg.GOARM.Version<=6 =>
7272
(RSBconst [32] (CLZ <t> (SUBconst <typ.UInt32> (AND <typ.UInt32> (ORconst <typ.UInt32> [0x10000] x) (RSBconst <typ.UInt32> [0] (ORconst <typ.UInt32> [0x10000] x))) [1])))
73-
(Ctz8 <t> x) && buildcfg.GOARM<=6 =>
73+
(Ctz8 <t> x) && buildcfg.GOARM.Version<=6 =>
7474
(RSBconst [32] (CLZ <t> (SUBconst <typ.UInt32> (AND <typ.UInt32> (ORconst <typ.UInt32> [0x100] x) (RSBconst <typ.UInt32> [0] (ORconst <typ.UInt32> [0x100] x))) [1])))
7575

7676
// count trailing zero for ARMv7
77-
(Ctz32 <t> x) && buildcfg.GOARM==7 => (CLZ <t> (RBIT <t> x))
78-
(Ctz16 <t> x) && buildcfg.GOARM==7 => (CLZ <t> (RBIT <typ.UInt32> (ORconst <typ.UInt32> [0x10000] x)))
79-
(Ctz8 <t> x) && buildcfg.GOARM==7 => (CLZ <t> (RBIT <typ.UInt32> (ORconst <typ.UInt32> [0x100] x)))
77+
(Ctz32 <t> x) && buildcfg.GOARM.Version==7 => (CLZ <t> (RBIT <t> x))
78+
(Ctz16 <t> x) && buildcfg.GOARM.Version==7 => (CLZ <t> (RBIT <typ.UInt32> (ORconst <typ.UInt32> [0x10000] x)))
79+
(Ctz8 <t> x) && buildcfg.GOARM.Version==7 => (CLZ <t> (RBIT <typ.UInt32> (ORconst <typ.UInt32> [0x100] x)))
8080

8181
// bit length
8282
(BitLen32 <t> x) => (RSBconst [32] (CLZ <t> x))
@@ -90,13 +90,13 @@
9090
// t5 = x right rotate 8 bits -- (d, a, b, c )
9191
// result = t4 ^ t5 -- (d, c, b, a )
9292
// using shifted ops this can be done in 4 instructions.
93-
(Bswap32 <t> x) && buildcfg.GOARM==5 =>
93+
(Bswap32 <t> x) && buildcfg.GOARM.Version==5 =>
9494
(XOR <t>
9595
(SRLconst <t> (BICconst <t> (XOR <t> x (SRRconst <t> [16] x)) [0xff0000]) [8])
9696
(SRRconst <t> x [8]))
9797

9898
// byte swap for ARMv6 and above
99-
(Bswap32 x) && buildcfg.GOARM>=6 => (REV x)
99+
(Bswap32 x) && buildcfg.GOARM.Version>=6 => (REV x)
100100

101101
// boolean ops -- booleans are represented with 0=false, 1=true
102102
(AndB ...) => (AND ...)
@@ -741,10 +741,10 @@
741741
(SUBconst [c] x) && !isARMImmRot(uint32(c)) && isARMImmRot(uint32(-c)) => (ADDconst [-c] x)
742742
(ANDconst [c] x) && !isARMImmRot(uint32(c)) && isARMImmRot(^uint32(c)) => (BICconst [int32(^uint32(c))] x)
743743
(BICconst [c] x) && !isARMImmRot(uint32(c)) && isARMImmRot(^uint32(c)) => (ANDconst [int32(^uint32(c))] x)
744-
(ADDconst [c] x) && buildcfg.GOARM==7 && !isARMImmRot(uint32(c)) && uint32(c)>0xffff && uint32(-c)<=0xffff => (SUBconst [-c] x)
745-
(SUBconst [c] x) && buildcfg.GOARM==7 && !isARMImmRot(uint32(c)) && uint32(c)>0xffff && uint32(-c)<=0xffff => (ADDconst [-c] x)
746-
(ANDconst [c] x) && buildcfg.GOARM==7 && !isARMImmRot(uint32(c)) && uint32(c)>0xffff && ^uint32(c)<=0xffff => (BICconst [int32(^uint32(c))] x)
747-
(BICconst [c] x) && buildcfg.GOARM==7 && !isARMImmRot(uint32(c)) && uint32(c)>0xffff && ^uint32(c)<=0xffff => (ANDconst [int32(^uint32(c))] x)
744+
(ADDconst [c] x) && buildcfg.GOARM.Version==7 && !isARMImmRot(uint32(c)) && uint32(c)>0xffff && uint32(-c)<=0xffff => (SUBconst [-c] x)
745+
(SUBconst [c] x) && buildcfg.GOARM.Version==7 && !isARMImmRot(uint32(c)) && uint32(c)>0xffff && uint32(-c)<=0xffff => (ADDconst [-c] x)
746+
(ANDconst [c] x) && buildcfg.GOARM.Version==7 && !isARMImmRot(uint32(c)) && uint32(c)>0xffff && ^uint32(c)<=0xffff => (BICconst [int32(^uint32(c))] x)
747+
(BICconst [c] x) && buildcfg.GOARM.Version==7 && !isARMImmRot(uint32(c)) && uint32(c)>0xffff && ^uint32(c)<=0xffff => (ANDconst [int32(^uint32(c))] x)
748748
(ADDconst [c] (MOVWconst [d])) => (MOVWconst [c+d])
749749
(ADDconst [c] (ADDconst [d] x)) => (ADDconst [c+d] x)
750750
(ADDconst [c] (SUBconst [d] x)) => (ADDconst [c-d] x)
@@ -1139,7 +1139,7 @@
11391139
// UBFX instruction is supported by ARMv6T2, ARMv7 and above versions, REV16 is supported by
11401140
// ARMv6 and above versions. So for ARMv6, we need to match SLLconst, SRLconst and ORshiftLL.
11411141
((ADDshiftLL|ORshiftLL|XORshiftLL) <typ.UInt16> [8] (BFXU <typ.UInt16> [int32(armBFAuxInt(8, 8))] x) x) => (REV16 x)
1142-
((ADDshiftLL|ORshiftLL|XORshiftLL) <typ.UInt16> [8] (SRLconst <typ.UInt16> [24] (SLLconst [16] x)) x) && buildcfg.GOARM>=6 => (REV16 x)
1142+
((ADDshiftLL|ORshiftLL|XORshiftLL) <typ.UInt16> [8] (SRLconst <typ.UInt16> [24] (SLLconst [16] x)) x) && buildcfg.GOARM.Version>=6 => (REV16 x)
11431143

11441144
// use indexed loads and stores
11451145
(MOVWload [0] {sym} (ADD ptr idx) mem) && sym == nil => (MOVWloadidx ptr idx mem)
@@ -1209,25 +1209,25 @@
12091209
(BIC x x) => (MOVWconst [0])
12101210

12111211
(ADD (MUL x y) a) => (MULA x y a)
1212-
(SUB a (MUL x y)) && buildcfg.GOARM == 7 => (MULS x y a)
1213-
(RSB (MUL x y) a) && buildcfg.GOARM == 7 => (MULS x y a)
1212+
(SUB a (MUL x y)) && buildcfg.GOARM.Version == 7 => (MULS x y a)
1213+
(RSB (MUL x y) a) && buildcfg.GOARM.Version == 7 => (MULS x y a)
12141214

1215-
(NEGF (MULF x y)) && buildcfg.GOARM >= 6 => (NMULF x y)
1216-
(NEGD (MULD x y)) && buildcfg.GOARM >= 6 => (NMULD x y)
1217-
(MULF (NEGF x) y) && buildcfg.GOARM >= 6 => (NMULF x y)
1218-
(MULD (NEGD x) y) && buildcfg.GOARM >= 6 => (NMULD x y)
1215+
(NEGF (MULF x y)) && buildcfg.GOARM.Version >= 6 => (NMULF x y)
1216+
(NEGD (MULD x y)) && buildcfg.GOARM.Version >= 6 => (NMULD x y)
1217+
(MULF (NEGF x) y) && buildcfg.GOARM.Version >= 6 => (NMULF x y)
1218+
(MULD (NEGD x) y) && buildcfg.GOARM.Version >= 6 => (NMULD x y)
12191219
(NMULF (NEGF x) y) => (MULF x y)
12201220
(NMULD (NEGD x) y) => (MULD x y)
12211221

12221222
// the result will overwrite the addend, since they are in the same register
1223-
(ADDF a (MULF x y)) && a.Uses == 1 && buildcfg.GOARM >= 6 => (MULAF a x y)
1224-
(ADDF a (NMULF x y)) && a.Uses == 1 && buildcfg.GOARM >= 6 => (MULSF a x y)
1225-
(ADDD a (MULD x y)) && a.Uses == 1 && buildcfg.GOARM >= 6 => (MULAD a x y)
1226-
(ADDD a (NMULD x y)) && a.Uses == 1 && buildcfg.GOARM >= 6 => (MULSD a x y)
1227-
(SUBF a (MULF x y)) && a.Uses == 1 && buildcfg.GOARM >= 6 => (MULSF a x y)
1228-
(SUBF a (NMULF x y)) && a.Uses == 1 && buildcfg.GOARM >= 6 => (MULAF a x y)
1229-
(SUBD a (MULD x y)) && a.Uses == 1 && buildcfg.GOARM >= 6 => (MULSD a x y)
1230-
(SUBD a (NMULD x y)) && a.Uses == 1 && buildcfg.GOARM >= 6 => (MULAD a x y)
1223+
(ADDF a (MULF x y)) && a.Uses == 1 && buildcfg.GOARM.Version >= 6 => (MULAF a x y)
1224+
(ADDF a (NMULF x y)) && a.Uses == 1 && buildcfg.GOARM.Version >= 6 => (MULSF a x y)
1225+
(ADDD a (MULD x y)) && a.Uses == 1 && buildcfg.GOARM.Version >= 6 => (MULAD a x y)
1226+
(ADDD a (NMULD x y)) && a.Uses == 1 && buildcfg.GOARM.Version >= 6 => (MULSD a x y)
1227+
(SUBF a (MULF x y)) && a.Uses == 1 && buildcfg.GOARM.Version >= 6 => (MULSF a x y)
1228+
(SUBF a (NMULF x y)) && a.Uses == 1 && buildcfg.GOARM.Version >= 6 => (MULAF a x y)
1229+
(SUBD a (MULD x y)) && a.Uses == 1 && buildcfg.GOARM.Version >= 6 => (MULSD a x y)
1230+
(SUBD a (NMULD x y)) && a.Uses == 1 && buildcfg.GOARM.Version >= 6 => (MULAD a x y)
12311231

12321232
(AND x (MVN y)) => (BIC x y)
12331233

@@ -1259,8 +1259,8 @@
12591259
(CMPD x (MOVDconst [0])) => (CMPD0 x)
12601260

12611261
// bit extraction
1262-
(SRAconst (SLLconst x [c]) [d]) && buildcfg.GOARM==7 && uint64(d)>=uint64(c) && uint64(d)<=31 => (BFX [(d-c)|(32-d)<<8] x)
1263-
(SRLconst (SLLconst x [c]) [d]) && buildcfg.GOARM==7 && uint64(d)>=uint64(c) && uint64(d)<=31 => (BFXU [(d-c)|(32-d)<<8] x)
1262+
(SRAconst (SLLconst x [c]) [d]) && buildcfg.GOARM.Version==7 && uint64(d)>=uint64(c) && uint64(d)<=31 => (BFX [(d-c)|(32-d)<<8] x)
1263+
(SRLconst (SLLconst x [c]) [d]) && buildcfg.GOARM.Version==7 && uint64(d)>=uint64(c) && uint64(d)<=31 => (BFXU [(d-c)|(32-d)<<8] x)
12641264

12651265
// comparison simplification
12661266
((EQ|NE) (CMP x (RSBconst [0] y))) => ((EQ|NE) (CMN x y)) // sense of carry bit not preserved; see also #50854

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