Convert arch insn group and reg type to newtype enums

This commit changes the bindgen settings so that bindgen generates newtype enums
instead of modules of constants for arch insn group types and reg types. Usages
of these binding types are updated as well.

Author: Lancern

capstone-rs/src/arch/arm.rs

@@ -35,9 +35,9 @@ impl ArchTag for ArmArchTag {
     type ExtraMode = ArchExtraMode;
     type Syntax = ArchSyntax;
 
-    type RegId = ArmReg::Type;
+    type RegId = ArmReg;
     type InsnId = ArmInsn;
-    type InsnGroupId = ArmInsnGroup::Type;
+    type InsnGroupId = ArmInsnGroup;
 
     type InsnDetail<'a> = ArmInsnDetail<'a>;
 
@@ -251,12 +251,12 @@ impl_PartialEq_repr_fields!(ArmInsnDetail<'a> [ 'a ];
 impl ArmOpMem {
     /// Base register
     pub fn base(&self) -> RegId {
-        RegId(self.0.base as RegIdInt)
+        RegId(self.0.base.0 as RegIdInt)
     }
 
     /// Index value
     pub fn index(&self) -> RegId {
-        RegId(self.0.index as RegIdInt)
+        RegId(self.0.index.0 as RegIdInt)
     }
 
     /// Scale for index register (can be 1, or -1)

capstone-rs/src/arch/arm64.rs

@@ -40,9 +40,9 @@ impl ArchTag for Arm64ArchTag {
     type ExtraMode = ArchExtraMode;
     type Syntax = ArchSyntax;
 
-    type RegId = Arm64Reg::Type;
+    type RegId = Arm64Reg;
     type InsnId = Arm64Insn;
-    type InsnGroupId = Arm64InsnGroup::Type;
+    type InsnGroupId = Arm64InsnGroup;
 
     type InsnDetail<'a> = Arm64InsnDetail<'a>;
 
@@ -88,7 +88,7 @@ impl Arm64OperandType {
 
         match op_type {
             ARM64_OP_INVALID => Invalid,
-            ARM64_OP_REG => Reg(RegId(unsafe { value.reg } as RegIdInt)),
+            ARM64_OP_REG => Reg(RegId(unsafe { value.reg.0 } as RegIdInt)),
             ARM64_OP_IMM => Imm(unsafe { value.imm }),
             ARM64_OP_MEM => Mem(Arm64OpMem(unsafe { value.mem })),
             ARM64_OP_FP => Fp(unsafe { value.fp }),
@@ -190,12 +190,12 @@ impl_PartialEq_repr_fields!(Arm64InsnDetail<'a> [ 'a ];
 impl Arm64OpMem {
     /// Base register
     pub fn base(&self) -> RegId {
-        RegId(self.0.base as RegIdInt)
+        RegId(self.0.base.0 as RegIdInt)
     }
 
     /// Index register
     pub fn index(&self) -> RegId {
-        RegId(self.0.index as RegIdInt)
+        RegId(self.0.index.0 as RegIdInt)
     }
 
     /// Disp value
@@ -318,19 +318,19 @@ mod test {
         }
 
         t(
-            (ARM64_OP_INVALID, cs_arm64_op__bindgen_ty_2 { reg: 0 }),
+            (ARM64_OP_INVALID, cs_arm64_op__bindgen_ty_2 { reg: Arm64Reg::ARM64_REG_INVALID }),
             Invalid,
         );
         t(
-            (ARM64_OP_REG, cs_arm64_op__bindgen_ty_2 { reg: 0 }),
+            (ARM64_OP_REG, cs_arm64_op__bindgen_ty_2 { reg: Arm64Reg::ARM64_REG_INVALID }),
             Reg(RegId(0)),
         );
         t(
             (ARM64_OP_IMM, cs_arm64_op__bindgen_ty_2 { imm: 42 }),
             Imm(42),
         );
         t(
-            (ARM64_OP_REG_MRS, cs_arm64_op__bindgen_ty_2 { reg: ARM64_SYSREG_MDRAR_EL1 as u32 }),
+            (ARM64_OP_REG_MRS, cs_arm64_op__bindgen_ty_2 { reg: Arm64Reg(ARM64_SYSREG_MDRAR_EL1 as u32) }),
             RegMrs(ARM64_SYSREG_MDRAR_EL1),
         );
         t(
@@ -347,8 +347,8 @@ mod test {
         );
         t(
             (ARM64_OP_REG_MSR, cs_arm64_op__bindgen_ty_2 {
-                reg: arm64_sysreg::ARM64_SYSREG_ICC_EOIR1_EL1 as u32 }),
-            RegMsr(arm64_sysreg::ARM64_SYSREG_ICC_EOIR1_EL1),
+                reg: Arm64Reg(ARM64_SYSREG_ICC_EOIR1_EL1 as u32) }),
+            RegMsr(ARM64_SYSREG_ICC_EOIR1_EL1),
         );
         t(
             (ARM64_OP_SYS, cs_arm64_op__bindgen_ty_2 { sys: arm64_sys_op::ARM64_AT_S1E0R }),

capstone-rs/src/arch/evm.rs

@@ -26,7 +26,7 @@ impl ArchTag for EvmArchTag {
 
     type RegId = u32;
     type InsnId = EvmInsn;
-    type InsnGroupId = EvmInsnGroup::Type;
+    type InsnGroupId = EvmInsnGroup;
 
     type InsnDetail<'a> = EvmInsnDetail<'a>;
 

capstone-rs/src/arch/m680x.rs

@@ -10,11 +10,12 @@ use capstone_sys::{
 // XXX todo(tmfink): create rusty versions
 pub use capstone_sys::m680x_insn as M680xInsn;
 pub use capstone_sys::m680x_reg as M680xReg;
+pub use capstone_sys::m680x_group_type as M680xInsnGroup;
 
 pub use crate::arch::arch_builder::m680x::*;
 use crate::arch::{ArchTag, DetailsArchInsn};
 use crate::arch::internal::ArchTagSealed;
-use crate::instruction::{RegId, RegIdInt};
+use crate::instruction::RegId;
 use crate::{Arch, InsnDetail};
 
 pub struct M680xArchTag;
@@ -28,9 +29,9 @@ impl ArchTag for M680xArchTag {
     type ExtraMode = ArchExtraMode;
     type Syntax = ArchSyntax;
 
-    type RegId = M680xReg::Type;
+    type RegId = M680xReg;
     type InsnId = M680xInsn;
-    type InsnGroupId = u32;
+    type InsnGroupId = M680xInsnGroup;
 
     type InsnDetail<'a> = M680xInsnDetail<'a>;
 
@@ -88,7 +89,7 @@ macro_rules! define_m680x_register_option_getter {
             if (self.0).$field == M680xReg::M680X_REG_INVALID {
                 None
             } else {
-                Some(RegId((self.0).$field as RegIdInt))
+                Some(self.0.$field.into())
             }
         }
     }
@@ -214,7 +215,7 @@ impl<'a> From<&'a cs_m680x_op> for M680xOperand {
     fn from(op: &cs_m680x_op) -> M680xOperand {
         let op_type = match op.type_ {
             m680x_op_type::M680X_OP_REGISTER => {
-                M680xOperandType::Reg(RegId(unsafe { op.__bindgen_anon_1.reg } as RegIdInt))
+                M680xOperandType::Reg(unsafe { op.__bindgen_anon_1.reg.into() })
             }
             m680x_op_type::M680X_OP_IMMEDIATE => {
                 M680xOperandType::Imm(unsafe { op.__bindgen_anon_1.imm })
@@ -281,7 +282,7 @@ mod test {
     fn m680x_op_type() {
         let op_base = cs_m680x_op {
             type_: m680x_op_type::M680X_OP_INVALID,
-            __bindgen_anon_1: cs_m680x_op__bindgen_ty_1 { reg: 0 },
+            __bindgen_anon_1: cs_m680x_op__bindgen_ty_1 { reg: M680xReg(0) },
             size: 1,
             access: 0,
         };
@@ -299,7 +300,7 @@ mod test {
                 ..op_base
             })
             .op_type,
-            M680xOperandType::Reg(RegId(M680xReg::M680X_REG_E as RegIdInt))
+            M680xOperandType::Reg(M680xReg::M680X_REG_E.into())
         );
         assert_eq!(
             M680xOperand::from(&cs_m680x_op {
@@ -391,8 +392,8 @@ mod test {
             flags: 7,
         });
 
-        assert_eq!(idx.base_reg(), Some(RegId(base_reg as RegIdInt)));
-        assert_eq!(idx.offset_reg(), Some(RegId(offset_reg as RegIdInt)));
+        assert_eq!(idx.base_reg(), Some(base_reg.into()));
+        assert_eq!(idx.offset_reg(), Some(offset_reg.into()));
         assert_eq!(idx.offset(), offset);
         assert_eq!(idx.offset_addr(), offset_addr);
         assert_eq!(idx.offset_bits(), offset_bits);