From f9f2106ad17acc58f0793bc75e2d246dc8605719 Mon Sep 17 00:00:00 2001 From: julianmorillo Date: Fri, 7 Nov 2025 12:56:50 +0100 Subject: [PATCH 1/4] Add content to RISC-V spec file --- init/arch_specs/eessi_arch_riscv.spec | 5 +++++ 1 file changed, 5 insertions(+) diff --git a/init/arch_specs/eessi_arch_riscv.spec b/init/arch_specs/eessi_arch_riscv.spec index 430dd2e7..59aeead8 100644 --- a/init/arch_specs/eessi_arch_riscv.spec +++ b/init/arch_specs/eessi_arch_riscv.spec @@ -1 +1,6 @@ +# RISC-V CPU architecture specifications (see https://github.com/riscv/learn?tab=readme-ov-file#open-risc-v-implementations) + # Software path in EESSI | Vendor ID | List of defining CPU features +"riscv64/sifive/u74mc" "SiFive" "rv64gc" # HiFive Unmatched +"riscv64/sifive/p550" "SiFive" "rv64imafdch zicsr zifencei zba zbb sscofpmf" # HiFive Premier P550 +"riscv64/spacemit/x60" "SpacemiT" "rv64imafdcv zicbom zicboz zicntr zicond zicsr zifencei zihintpause zihpm zfh zfhmin zca zcd zba zbb zbc zbs zkt zve32f zve32x zve64d zve64f zve64x zvfh zvfhmin zvkt sscofpmf sstc svinval svnapot svpbmt" # Banana Pi F3 From 8309c1c42bda352b07ee0f07324e1561d0c88e29 Mon Sep 17 00:00:00 2001 From: Julian Morillo Date: Fri, 7 Nov 2025 15:19:47 +0100 Subject: [PATCH 2/4] Provide correct detection for the RISC-V clusters at HCA (https://repo.hca.bsc.es/gitlab/epi-public/risc-v-software-development-vehicles/-/wikis/HCA-Nodes-and-Queues#commercial-risc-v-nodes) --- init/arch_specs/eessi_arch_riscv.spec | 6 +++--- init/eessi_archdetect.sh | 6 ++++++ 2 files changed, 9 insertions(+), 3 deletions(-) diff --git a/init/arch_specs/eessi_arch_riscv.spec b/init/arch_specs/eessi_arch_riscv.spec index 59aeead8..c1cb5af1 100644 --- a/init/arch_specs/eessi_arch_riscv.spec +++ b/init/arch_specs/eessi_arch_riscv.spec @@ -1,6 +1,6 @@ # RISC-V CPU architecture specifications (see https://github.com/riscv/learn?tab=readme-ov-file#open-risc-v-implementations) +# CPU vendors: SiFive (0x489), Spacemit (0x710) # Software path in EESSI | Vendor ID | List of defining CPU features -"riscv64/sifive/u74mc" "SiFive" "rv64gc" # HiFive Unmatched -"riscv64/sifive/p550" "SiFive" "rv64imafdch zicsr zifencei zba zbb sscofpmf" # HiFive Premier P550 -"riscv64/spacemit/x60" "SpacemiT" "rv64imafdcv zicbom zicboz zicntr zicond zicsr zifencei zihintpause zihpm zfh zfhmin zca zcd zba zbb zbc zbs zkt zve32f zve32x zve64d zve64f zve64x zvfh zvfhmin zvkt sscofpmf sstc svinval svnapot svpbmt" # Banana Pi F3 +"riscv64/sifive/p550" "0x489" "rv64imafdch_zicsr_zifencei_zba_zbb_sscofpmf" # HiFive Premier P550 +"riscv64/spacemit/x60" "0x710" "rv64imafdcv_zicbom_zicboz_zicntr_zicond_zicsr_zifencei_zihintpause_zihpm_zfh_zfhmin_zca_zcd_zba_zbb_zbc_zbs_zkt_zve32f_zve32x_zve64d_zve64f_zve64x_zvfh_zvfhmin_zvkt_sscofpmf_sstc_svinval_svnapot_svpbmt" # Banana Pi F3 diff --git a/init/eessi_archdetect.sh b/init/eessi_archdetect.sh index 4fd979ce..3dd1f0c1 100755 --- a/init/eessi_archdetect.sh +++ b/init/eessi_archdetect.sh @@ -114,6 +114,9 @@ cpupath(){ local cpu_vendor=$(get_cpuinfo "vendor[ _]id") if [ "${cpu_vendor}" == "" ]; then cpu_vendor=$(get_cpuinfo "cpu[ _]implementer") + if [ "${cpu_vendor}" == "" ]; then + cpu_vendor=$(get_cpuinfo "mvendorid") + fi fi log "DEBUG" "cpupath: CPU vendor of host system: '$cpu_vendor'" @@ -129,6 +132,9 @@ cpupath(){ # on 64-bit POWER, we need to look at 'cpu' field elif [ "${machine_type}" == "ppc64le" ]; then cpu_flag_tag='cpu' + # on 64-bit RISC-V, we need to look at 'isa' field + elif [ "${machine_type}" == "riscv64" ]; then + cpu_flag_tag='isa' else cpu_flag_tag='flags' fi From aed30ea343d2cbbeeb96d3f770faec058cd78bb4 Mon Sep 17 00:00:00 2001 From: Julian Morillo Date: Fri, 14 Nov 2025 12:00:48 +0100 Subject: [PATCH 3/4] Add tests for added RISC-V microarchitectures --- .github/workflows/tests_archdetect.yml | 2 ++ .../riscv64/sifive/premier-Ubuntu24.all.output | 1 + tests/archdetect/riscv64/sifive/premier-Ubuntu24.cpuinfo | 8 ++++++++ tests/archdetect/riscv64/sifive/premier-Ubuntu24.output | 1 + .../riscv64/spacemit/bananaf3-Armbian.all.output | 1 + .../archdetect/riscv64/spacemit/bananaf3-Armbian.cpuinfo | 9 +++++++++ .../archdetect/riscv64/spacemit/bananaf3-Armbian.output | 1 + 7 files changed, 23 insertions(+) create mode 100644 tests/archdetect/riscv64/sifive/premier-Ubuntu24.all.output create mode 100644 tests/archdetect/riscv64/sifive/premier-Ubuntu24.cpuinfo create mode 100644 tests/archdetect/riscv64/sifive/premier-Ubuntu24.output create mode 100644 tests/archdetect/riscv64/spacemit/bananaf3-Armbian.all.output create mode 100644 tests/archdetect/riscv64/spacemit/bananaf3-Armbian.cpuinfo create mode 100644 tests/archdetect/riscv64/spacemit/bananaf3-Armbian.output diff --git a/.github/workflows/tests_archdetect.yml b/.github/workflows/tests_archdetect.yml index 339eda26..ef0e427e 100644 --- a/.github/workflows/tests_archdetect.yml +++ b/.github/workflows/tests_archdetect.yml @@ -25,6 +25,8 @@ jobs: - aarch64/neoverse_v1/AWS-awslinux-graviton3 - aarch64/nvidia/grace/Jureca-Rocky95 - aarch64/google/axion/GCP-axion + - riscv64/sifive/premier-Ubuntu24 + - riscv64/spacemit/bananaf3-Armbian # commented out since these targets are currently not supported in software.eessi.io repo # (and some tests assume that the corresponding subdirectory in software layer is there) # - ppc64le/power9le/unknown-power9le diff --git a/tests/archdetect/riscv64/sifive/premier-Ubuntu24.all.output b/tests/archdetect/riscv64/sifive/premier-Ubuntu24.all.output new file mode 100644 index 00000000..c0dc61c1 --- /dev/null +++ b/tests/archdetect/riscv64/sifive/premier-Ubuntu24.all.output @@ -0,0 +1 @@ +riscv64/sifive/p550:riscv64/generic diff --git a/tests/archdetect/riscv64/sifive/premier-Ubuntu24.cpuinfo b/tests/archdetect/riscv64/sifive/premier-Ubuntu24.cpuinfo new file mode 100644 index 00000000..9868b782 --- /dev/null +++ b/tests/archdetect/riscv64/sifive/premier-Ubuntu24.cpuinfo @@ -0,0 +1,8 @@ +processor : 0 +hart : 3 +isa : rv64imafdch_zicsr_zifencei_zba_zbb_sscofpmf +mmu : sv48 +mvendorid : 0x489 +marchid : 0x8000000000000008 +mimpid : 0x6220425 + diff --git a/tests/archdetect/riscv64/sifive/premier-Ubuntu24.output b/tests/archdetect/riscv64/sifive/premier-Ubuntu24.output new file mode 100644 index 00000000..1a6a20d3 --- /dev/null +++ b/tests/archdetect/riscv64/sifive/premier-Ubuntu24.output @@ -0,0 +1 @@ +riscv64/sifive/p550 diff --git a/tests/archdetect/riscv64/spacemit/bananaf3-Armbian.all.output b/tests/archdetect/riscv64/spacemit/bananaf3-Armbian.all.output new file mode 100644 index 00000000..f00000a8 --- /dev/null +++ b/tests/archdetect/riscv64/spacemit/bananaf3-Armbian.all.output @@ -0,0 +1 @@ +riscv64/spacemit/x60:riscv64/generic diff --git a/tests/archdetect/riscv64/spacemit/bananaf3-Armbian.cpuinfo b/tests/archdetect/riscv64/spacemit/bananaf3-Armbian.cpuinfo new file mode 100644 index 00000000..11c32f92 --- /dev/null +++ b/tests/archdetect/riscv64/spacemit/bananaf3-Armbian.cpuinfo @@ -0,0 +1,9 @@ +processor : 0 +hart : 0 +model name : Spacemit(R) X60 +isa : rv64imafdcv_sscofpmf_sstc_svpbmt_zicbom_zicboz_zicbop_zihintpause +mmu : sv39 +mvendorid : 0x710 +marchid : 0x8000000058000001 +mimpid : 0x1000000049772200 + diff --git a/tests/archdetect/riscv64/spacemit/bananaf3-Armbian.output b/tests/archdetect/riscv64/spacemit/bananaf3-Armbian.output new file mode 100644 index 00000000..f4e3facf --- /dev/null +++ b/tests/archdetect/riscv64/spacemit/bananaf3-Armbian.output @@ -0,0 +1 @@ +riscv64/spacemit/x60 From ac6c22e56bb2bc4e5a0fbf16c721acf799154999 Mon Sep 17 00:00:00 2001 From: Julian Morillo Date: Mon, 17 Nov 2025 10:55:34 +0100 Subject: [PATCH 4/4] Add a new Banana Pi F3 architecture as the detected isa depends on the kernel used --- .github/workflows/tests_archdetect.yml | 1 + init/arch_specs/eessi_arch_riscv.spec | 3 ++- .../archdetect/riscv64/spacemit/bananaf3-k6.6.all.output | 1 + tests/archdetect/riscv64/spacemit/bananaf3-k6.6.cpuinfo | 9 +++++++++ tests/archdetect/riscv64/spacemit/bananaf3-k6.6.output | 1 + 5 files changed, 14 insertions(+), 1 deletion(-) create mode 100644 tests/archdetect/riscv64/spacemit/bananaf3-k6.6.all.output create mode 100644 tests/archdetect/riscv64/spacemit/bananaf3-k6.6.cpuinfo create mode 100644 tests/archdetect/riscv64/spacemit/bananaf3-k6.6.output diff --git a/.github/workflows/tests_archdetect.yml b/.github/workflows/tests_archdetect.yml index ef0e427e..891669a2 100644 --- a/.github/workflows/tests_archdetect.yml +++ b/.github/workflows/tests_archdetect.yml @@ -27,6 +27,7 @@ jobs: - aarch64/google/axion/GCP-axion - riscv64/sifive/premier-Ubuntu24 - riscv64/spacemit/bananaf3-Armbian + - riscv64/spacemit/bananaf3-k6.6 # commented out since these targets are currently not supported in software.eessi.io repo # (and some tests assume that the corresponding subdirectory in software layer is there) # - ppc64le/power9le/unknown-power9le diff --git a/init/arch_specs/eessi_arch_riscv.spec b/init/arch_specs/eessi_arch_riscv.spec index c1cb5af1..aa56fcaa 100644 --- a/init/arch_specs/eessi_arch_riscv.spec +++ b/init/arch_specs/eessi_arch_riscv.spec @@ -3,4 +3,5 @@ # Software path in EESSI | Vendor ID | List of defining CPU features "riscv64/sifive/p550" "0x489" "rv64imafdch_zicsr_zifencei_zba_zbb_sscofpmf" # HiFive Premier P550 -"riscv64/spacemit/x60" "0x710" "rv64imafdcv_zicbom_zicboz_zicntr_zicond_zicsr_zifencei_zihintpause_zihpm_zfh_zfhmin_zca_zcd_zba_zbb_zbc_zbs_zkt_zve32f_zve32x_zve64d_zve64f_zve64x_zvfh_zvfhmin_zvkt_sscofpmf_sstc_svinval_svnapot_svpbmt" # Banana Pi F3 +"riscv64/spacemit/x60" "0x710" "rv64imafdcv_sscofpmf_sstc_svpbmt_zicbom_zicboz_zicbop_zihintpause" # Banana Pi F3 +"riscv64/spacemit/x60-k6.6" "0x710" "rv64imafdcv_zicbom_zicboz_zicntr_zicond_zicsr_zifencei_zihintpause_zihpm_zfh_zfhmin_zca_zcd_zba_zbb_zbc_zbs_zkt_zve32f_zve32x_zve64d_zve64f_zve64x_zvfh_zvfhmin_zvkt_sscofpmf_sstc_svinval_svnapot_svpbmt" # Banana Pi F3 k6.6 diff --git a/tests/archdetect/riscv64/spacemit/bananaf3-k6.6.all.output b/tests/archdetect/riscv64/spacemit/bananaf3-k6.6.all.output new file mode 100644 index 00000000..e514227d --- /dev/null +++ b/tests/archdetect/riscv64/spacemit/bananaf3-k6.6.all.output @@ -0,0 +1 @@ +riscv64/spacemit/x60-k6.6:riscv64/generic diff --git a/tests/archdetect/riscv64/spacemit/bananaf3-k6.6.cpuinfo b/tests/archdetect/riscv64/spacemit/bananaf3-k6.6.cpuinfo new file mode 100644 index 00000000..a3fc2ba0 --- /dev/null +++ b/tests/archdetect/riscv64/spacemit/bananaf3-k6.6.cpuinfo @@ -0,0 +1,9 @@ +processor : 0 +hart : 0 +model name : Spacemit(R) X60 +isa : rv64imafdcv_zicbom_zicboz_zicntr_zicond_zicsr_zifencei_zihintpause_zihpm_zfh_zfhmin_zca_zcd_zba_zbb_zbc_zbs_zkt_zve32f_zve32x_zve64d_zve64f_zve64x_zvfh_zvfhmin_zvkt_sscofpmf_sstc_svinval_svnapot_svpbmt +mmu : sv39 +uarch : spacemit,x60 +mvendorid : 0x710 +marchid : 0x8000000058000001 +mimpid : 0x1000000049772200 diff --git a/tests/archdetect/riscv64/spacemit/bananaf3-k6.6.output b/tests/archdetect/riscv64/spacemit/bananaf3-k6.6.output new file mode 100644 index 00000000..c92da406 --- /dev/null +++ b/tests/archdetect/riscv64/spacemit/bananaf3-k6.6.output @@ -0,0 +1 @@ +riscv64/spacemit/x60-k6.6